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| SI2400 V. 2 2B I S I S O M O D E M TM W I T H I N T E G R A T E D G L O B A L DA A Features i2 40 0 S ! Data Modem Formats " " " " " ! Integrated DAA " " " " 2400 bps: V.22bis 1200 bps: V.22, V.23, Bell 212A 300 bps: V.21, Bell 103 V.25 Fast Connect and V.23 Reversing SIA and other security protocols ! ! ! ! ! Capacitive Isolation Parallel Phone Detect Globally Compliant Line Interface Overcurrent Protection ! ! ! ! Caller ID Detection and Decode DTMF Tone Gen./Detection 3.3 V or 5.0 V Power UART with Flow Control AT Command Set Support Integrated Voice Codec PCM Data Pass-Through Mode HDLC Framing in Hardware Call Progress Support Ordering Information See page 71. Applications Pin Assignments ! ! Set Top Boxes Power Meters ! ! Security Systems ATM Terminals ! ! Medical Monitoring Point-of-Sale XTALI 1 2 3 4 5 6 7 8 XTALO CLKOUT VD TXD RXD CTS RESET SI2400 16 15 14 13 12 11 10 9 EOFR/GPIO1 AIN/GPIO2 ESC/GPIO3 ISOB GND C1A ALERT/GPIO4 AOUT Description The SI2400 ISOmodemTM is a complete modem chipset with integrated direct access arrangement (DAA) that provides a programmable line interface to meet global telephone line requirements. Available in two 16pin small outline (SOIC) packages, it eliminates the need for a separate DSP data pump, modem controller, analog front end (AFE), isolation transformer, relays, opto-isolators, 2- to 4-wire hybrid, and voice codec. The SI2400 is ideal for embedded modem applications due to its small board space, low power consumption, and global compliance. Si3015 QE2 DCT IGND C1B RNG1 RNG2 QB 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 FILT2 FILT RX REXT REXT2 REF VREG2 VREG Functional Block Diagram SI2400 UART TXD RXD Si3015 MUX Controller (AT Decoder Call Progress) Isolation Interface Isolation Interface RX Hybrid and DC Termination QE RESET EOFR/GPIO1 AIN/GPIO2 ESC/GPIO3 ALERT/GPIO4 CTS Audio Codec FILT FILT2 REF DCT VREG2 REXT REXT2 Patents pending DSP (Data Pump) Control Interface Ring Detect Off-Hook CLKOUT XTALI XTALO Clock Interface RNG1 RNG2 QB QE QE2 AOUT Rev. 0.95 4/00 Copyright (c) 2000 by Silicon Laboratories S i3 01 SI2400-DS095 5 S i2 40 0 2 Rev. 0.95 SI2400 TA B L E O F CON T E N T S Section Page 4 9 9 10 11 12 13 13 14 15 15 18 18 18 19 19 21 21 22 23 23 25 25 25 25 27 30 32 35 62 67 68 71 72 76 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Typical Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Typical Application Circuit Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Analog Input/Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Configurations and Data Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Low Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Global DAA Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parallel Phone Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Carrier Detect/Loss . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Overcurrent Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Caller ID Decoding Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tone Generation and Tone Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PCM Data Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Analog Codec . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V.23 Operation/V.23 Reversing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V.42 HDLC Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fast Connect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Clock Generation Subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AT Command Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Command Line Execution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . < CR > End Of Line Character . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AT Command Set Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Extended AT Commands for the Alarm Industry . . . . . . . . . . . . . . . . . . . . . . . . . . . . Modem Result Codes and Call Progress . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Low Level DSP Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . S Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Appendix A--DAA Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Appendix B--Typical Modem Applications Examples . . . . . . . . . . . . . . . . . . . . . . . . . Appendix C--UL1950 3rd Edition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Rev. 0.95 3 S i2 40 0 Electrical Specifications Table 1. Recommended Operating Conditions Parameter1 Ambient Temperature Ambient Temperature SI2400 Supply Voltage, Digital3 Symbol TA TA VD Test Condition K-Grade B-Grade Min2 0 -40 3.0 Typ 25 25 3.3/5.0 Max2 70 85 5.25 Unit C C V Notes: 1. The SI2400 specifications are guaranteed when the typical application circuit (including component tolerance) and any SI2400 and any Si3015 are used. See Figure 3 on page 9 for typical application circuit. 2. All minimum and maximum specifications are guaranteed and apply across the recommended operating conditions. Typical values apply at nominal supply voltages and an operating temperature of 25 C unless otherwise stated. 3. The digital supply, VD, can operate from either 3.3 V or 5.0 V. The SI2400 interface supports 3.3 V logic when operating from 3.3 V. The 3.3 V operation applies to both the serial port and the digital signals CTS, CLKOUT, GPIO1-4, and RESET. Table 2. DAA Loop Characteristics (VD = 3.0 to 3.6 V or 4.75 to 5.25 V, TA = 0 to 70C for K-Grade, TA = -40 to 85C for B-Grade) Parameter DC Termination Voltage DC Termination Voltage DC Termination Voltage DC Termination Voltage DC Termination Voltage DC Termination Voltage DC Termination Voltage DC Termination Voltage On Hook Leakage Current Operating Loop Current Operating Loop Current DC Ring Current Ring Detect Voltage Ring Detect Voltage Ring Frequency Ringer Equivalence Number* *Note: C15, R14, Z2, and Z3 not installed. Symbol VTR VTR VTR VTR VTR VTR VTR VTR ILK ILP ILP VRD VRD FR REN Test Condition IL = 20 mA, ACT = 1 DCT = 11 (CTR21) IL = 42 mA, ACT = 1 DCT = 11 (CTR21) IL = 50 mA, ACT = 1 DCT = 11 (CTR21) IL = 60 mA, ACT = 1 DCT = 11 (CTR21) IL = 20 mA, ACT = 0 DCT = 01 (Japan) IL = 100 mA, ACT = 0 DCT = 01 (Japan) IL = 20 mA, ACT = 0 DCT = 10 (FCC) IL = 100 mA, ACT = 0 DCT = 10 (FCC) VBAT = -48 V FCC/Japan Modes CTR21 RT = 0 RT = 1 Min -- -- -- 40 -- 11 -- 12 -- 13 13 -- 11 17 15 -- Typ -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Max 7.5 14.5 40 -- 6.0 -- 7.5 -- 1 120 60 20 22 33 68 0.2 Unit V V V V V V V V A mA mA A VRMS VRMS Hz 4 Rev. 0.95 SI2400 Table 3. DC Characteristics (VD = 4.75 to 5.25 V, TA = 0 to 70C for K-Grade, TA = -40 to 85C for B-Grade) Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Low Level Output Voltage, GPIO1-4 Input Leakage Current Power Supply Current, Digital* Power Supply Current, DSP Power Down* Power Supply Current, Wake-On-Ring (ATZ) Power Supply Current, Total Power Down Symbol Test Condition VIH VIL VOH VOL VOL IL ID ID ID ID VD pin VD pin VD pin VD pin IO = -2 mA IO = 2 mA IO = 40 mA Min 3.5 -- 2.4 -- -- -10 -- -- -- -- Typ -- -- -- -- -- -- 28 16 10 60 Max -- 0.8 -- 0.4 0.6 10 32 19 11 105 Unit V V V V V A mA mA mA A *Note: Specifications assume MCKR = 0 (default). Typical value is 4 mA lower when MCKR = 1 and 6 mA lower when MCKR = 2,3. Measurements are taken with inputs at rails and no loads on outputs. Table 4. DC Characteristics (VD = 3.0 to 3.6 V, TA = 0 to 70C for K-Grade, TA = -40 to 85C for B-Grade) Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Low Level Output Voltage, GPIO1-4 Input Leakage Current Power Supply Current, Digital Power Supply Current, DSP Power Down Power Supply Current, Wake-On-Ring Power Supply Current, Total Power Down Symbol Test Condition VIH VIL VOH VOL VOL IL ID ID ID ID VD pin VD pin VD pin VD pin IO = -2 mA IO = 2 mA IO = 20 mA Min 2.1 -- 2.4 -- -- -10 -- -- -- -- Typ -- -- -- -- -- -- 15 9 5 40 Max -- 0.8 -- 0.35 0.6 10 21 14 8 55 Unit V V V V V A mA mA mA A *Note: Specifications assume MCKR = 0 (default). Typical value is 2 mA lower when MCKR = 1 and 3 mA lower when MCKR = 2,3. Measurements are taken with inputs at rails and no loads on outputs. TIP + 600 Si3015 VTR 10 F - IL RING Figure 1. Test Circuit for Loop Characteristics Rev. 0.95 5 S i2 40 0 Table 5. DAA AC Characteristics (VD = 3.0 to 3.6 V or 4.75 to 5.25 V, TA = 0 to 70C for K-Grade, TA = -40 to 85C for B-Grade) Parameter Transmit Frequency Response Receive Frequency Response Transmit Full Scale Level1 Receive Full Scale Level Dynamic Range3,4 Dynamic Range3,5 Dynamic Range3 Transmit Total Harmonic Distortion4,6 Transmit Total Harmonic Distortion5,6 Receive Total Harmonic Distortion4,6 Receive Total Harmonic Distortion4,6 Dynamic Range (Caller ID mode) Caller ID Full Scale Level (0 dB gain) 1 1,2 Symbol Test Condition Low -3 dB Corner Low -3 dB Corner Min -- -- -- -- Typ 5 5 0.6 0.6 82 82 82 -75 -75 -75 -75 60 2.7 Max -- -- -- -- -- -- -- -- -- -- -- -- -- Unit Hz Hz dBm dBm dB dB dB dB dB dB dB dB VPEAK VFS VFS DR DR DR THD THD THD THD DRCID VCID ACT = 0, DCT = 10 (FCC) IL = 100 mA ACT = 0, DCT = 01 (Japan) IL = 20 mA ACT = 1, DCT = 11(CTR21) IL = 60 mA ACT = 0, DCT = 10 (FCC) IL = 100 mA ACT = 0, DCT = 01 (Japan) IL = 20 mA ACT = 0, DCT = 01 (Japan) IL = 20 mA ACT = 1, DCT = 11 (CTR21) IL = 60 mA VIN = 1 kHz, -13 dB -- -- -- -- -- -- -- -- -- Notes: 1. Measured at TIP and RING with 600 termination. 2. Receive full scale level will produce -0.9 dBFS at TXD. 3. DR = VIN + 20*log (RMS signal/RMS noise). Measurement is 300 to 3400 Hz. Applies to both transmit and receive paths. Vin = 1 kHz, -3dBFS, Fs = 10300 Hz 4. Vin = 1 KHz, -3 dB 5. Vin = 1 KHz, -9 dB 6. THD = 20*log (RMS distortion/RMS signal). Vin = 1 kHz, -3 dBFS, Fs = 10.3 kHz 6 Rev. 0.95 SI2400 Table 6. Voice Codec AC Characteristics (VD = 3.0 to 3.6 V or 4.75 to 5.25 V, TA = 0 to 70C for K-Grade, TA = -40 to 85C for B-Grade) Parameter AOUT Dynamic Range, APO = 0 AOUT THD, APO = 0 AOUT Full Scale Level, APO = 0 AOUT Mute Level, APO = 0 AOUT Dynamic Range, APO = 1, VD = 4.75 to 5.25 V AOUT Dynamic Range, APO = 1, VD = 3 to 3.6 V AOUT THD, APO = 1, VD = 4.75 to 5.25 V AOUT THD, APO = 1, VD = 3 to 3.6 V AOUT Full Scale Level, APO = 1 AOUT Mute Level, APO = 1 AOUT Resistive Loading, APO = 1 AOUT Capacitive Loading, APO = 1 AIN Dynamic Range, VD = 4.75 to 5.25 V AIN Dynamic Range, VD = 3 to 3.6 V AIN THD, VD = 4.75 to 5.25 V AIN THD, VD = 3 to 3.6 V AIN Full Scale Level* Symbol Test Condition VIN = 1 kHz VIN = 1 kHz Min -- -- -- -- Typ 40 -40 0.7*VDD 60 65 65 -60 -60 1.5 -65 -- -- 65 65 -60 -60 2.8 Max -- -- -- -- -- -- -- -- -- -- -- 20 -- -- -- -- -- Unit dB dB VPP dB dB dB dB dB VPP dB k pF dB dB dB dB VPP VIN = 1 kHz, -3 dB VIN = 1 kHz, -3 dB VIN = 1 kHz, -3 dB VIN = 1 kHz, -3 dB 60 55 -55 -40 -- -- 10 -- VIN = 1 kHz, -3 dB VIN = 1 kHz, -3 dB VIN = 1 kHz, -3 dB VIN = 1 kHz, -3 dB 60 55 -55 -40 -- *Note: Receive full scale level will produce -0.9 dBFS at TXD. Table 7. Absolute Maximum Ratings Parameter DC Supply Voltage Input Current, SI2400 Digital Input Pins Digital Input Voltage Operating Temperature Range Storage Temperature Range Symbol VD IIN VIND TA TSTG Value -0.5 to 6.0 10 -0.3 to (VD + 0.3) -10 to 100 -40 to 150 Unit V A V C C Note: Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. 0.95 7 S i2 40 0 Table 8. Switching Characteristics (VD = 3.0 to 3.6 V or 4.75 to 5.25 V, TA = 0 to 70C for K-Grade, TA = -40 to 85C for B-Grade) Parameter CLKOUT Output Clock Frequency Symbol tbd tsbc tcsb trs trs2 Min 2.4576 Typ -- Max 39.3216 Unit MHz Baud Rate Accuracy Start Bit to CTS CTS Active to Start Bit RESET to RESET RESET Rise Time -1 -- 10 5.0 -- -- 1/(2*Baud Rate) -- -- -- 1 -- -- -- 100 % ns ns msec ns Note: All timing is referenced to the 50% level of the waveform. Input test levels are VIH = VD - 0.4 V, VIL = 0.4 V Transmit Timing TXD Start 8-Bit Data Mode (Default) TXD 9-Bit Data Mode Start D0 D1 D2 D3 D4 D5 D6 D7 D8 Stop D0 D1 D2 D3 D4 D5 D6 D7 Stop Receive Timing RXD 8-Bit Data Start Mode(Default) RXD 9-Bit Data Mode tcsb tsbc D0 D1 D2 D3 D4 D5 D6 D7 Stop Start D0 D1 D2 D3 D4 D5 D6 D7 D8 Stop CTS Note: Baud rates (programmed through register SE0) are as follows: 300, 1200, 2400, 9600, 19200, 230400, 245760, and 307200 Hz. Figure 2. Asynchronous UART Serial Interface Timing Diagram 8 Rev. 0.95 Typical Application Circuit VCC C10 C27 C26 Q4 1 No Ground Plane In DAA Section X1 2 Q1 R5 R15 R8 R7 GPIO3/AIN/ESC GPIO2/AIN/RXD2 GPIO1/AIN/TXD2/EOFR 1 2 3 4 5 6 7 8 U1 XTALI XTALO CLKOUT VD TXD RXD CTS RESET SI2400 AOUT GPIO4/AIN/ALERT C3 GPIO1 GPIO2 GPIO3 ISOB GND C1A GPIO4 AOUT 16 15 14 13 12 11 10 9 C30 U2 1 2 3 4 5 6 7 8 TSTA/QE2 TX/FILT2 TSTB/DCT NC/FILT IGND RX C1B REXT RNG1 DCT/REXT2 RNG2 NC/REF QB NC/VREG2 QE VREG Si3015 C13 C12 + R24 CLKOUT TXD RXD CTS RESET C1 16 15 14 13 12 11 10 9 R11 C6 C16 C14 + R13 R12 R2 Q2 + C5 R18 R6 Z1 R19 R17 R16 C20 C2 Q3 Rev. 0.95 C4 C8 R10 FB2 RING C19 D2 C9 R26 C25 C32 RV1 RV2 R25 C18 C7 R9 FB1 TIP D1 C24 C31 Note 1: R12 R13 and C14 are onl required if complex AC termination is used ACT bit Note 2: See "Ringer Impedance" section for optional Czech Republic support. Note 3: See "Billing Tone Immunit " section for optional billing tone filter German Note 4: See Appendix for applications requiring UL 1950 3rd edition compliance. 1. S itzerland South Africa . SI2400 Figure 3. Typical Application Circuit Schematic 9 S i2 40 0 Bill of Materials Table 9. Global Component Values--SI2400 Chipset Component C1,C4 C21 C3 C52 C6,C10,C13,C16 C7,C8 C9 C12 C142 C18,C19 C20 C24,C25 C26,C27 C303 C31,C323 D1,D24 FB1,FB2 Q1,Q3 Q2 Q45 RV1 RV26 R22 R5 R6 R7,R8,R15,R16,R17,R198 R9,R10 R11 R122 R132 R18 R24 R25,R26 U1 U2 Y1 Z12 Value 150 pF, 3 kV, X7R,20% 150 pF, 3 kV, X7R,20% 0.22 F, 16 V, X7R, 20% 0.1 F, 50 V, Elec/Tant/X7R, 20% 0.1 F, 16 V, X7R, 20% 1800 pF, 250 V, X7R, 20% 22 nF, 250 V, X7R, 20% 1.0 F, 16 V, Tant/X7R, 20% 0.68 F, 16 V, X7R/Elec/Tant, 20% 12 nF, 16 V, X7R, 20% 0.01 F, 16 V, X7R, 20% 1000 pF, 3 kV, X7R, 10% 33 pF, 16 V, NPO, 5% 10 pF, 16 V, NPO, 10% 1000 pF, 3 kV, X7R, 10% Dual Diode, 300 V, 225 mA Ferrite Bead, BLM31A601S A42, NPN, 300 V A92, PNP, 300 V BCP56, NPN, 60 V, 1/2 W Sidactor, 275 V, 100 A 240 V, MOV 402 , 1/16 W, 1% 100 k, 1/16 W, 1% 120 k, 1/16 W, 5% 4.87 k, 1/4 W, 1% 15 k, 1/10 W, 5% 10 k, 1/16 W, 1% 78.7 , 1/16 W, 1% 215 , 1/16 W, 1% 2.2 k, 1/10 W, 5% 150 , 1/16 W, 5% 10 M, 1/16 W, 5% SI2400 Si3015 4.9152 MHz, 20 pF, 50 ppm, 150 ESR Zener Diode, 43 V, 1/2 W Suppliers Novacap, Venkel, Johanson, Murata, Panasonic Not Installed Novacap, Venkel, Johanson, Murata, Panasonic Novacap, Venkel, Johanson, Murata, Panasonic Novacap, Venkel, Johanson, Murata, Panasonic Not Installed Not Installed Central Semiconductor Murata OnSemiconductor, Fairchild, Zetex OnSemiconductor, Fairchild, Zetex OnSemiconductor, Fairchild Teccor, ST Microelectronics, Microsemi, TI Not Installed Silicon Labs Silicon Labs Not Installed Vishay, Motorola, Rohm Notes: 1. 2. 3. 4. 5. 6. 7. C2 was included in previous revisions of the data sheet. Replacing C2 with C4 improves longitudinal balance. For FCC-only designs: C14, R12, and R13 are not required; R2 may be 5%; with Z1 rated at 18 V, C5 may be rated at 16 V; also see note 7. C30, C31, C32 may provide an additional improvement in emissions/immunity and/or voice performance, depending on design and layout. Population option recommended. See "Emissions/Immunity" on page 62. Several diode bridge configurations are acceptable (suppliers include General Semi., Diodes Inc.). Q4 may require copper on board to meet 1/2 W power requirement. (Contact manufacturer for details.) RV2 can be installed to improve performance from 2500 V to 3500 V for multiple longitudinal surges (240 V, MOV). The R7, R8, R15, and R16, R17, R19 resistors may each be replaced with a single resistor of 1.62 k, 3/4 W, 1%. For FCC-only designs, 1.62 k, 1/16 W, 5% resistors may be used. 10 Rev. 0.95 SI2400 Analog Input/Output Figure 4 illustrates an optional application circuit to support the analog output capability of the SI2400 for voice monitoring purposes. +5V C2 AOUT R3 3 2 4 C6 R1 6 5 U1 C3 R2 C5 C4 Speaker Figure 4. Optional Connection to AOUT for a Monitoring Speaker ` Table 10. Component Values--Optional Connection to AOUT Symbol C2, C3, C5 C4 C6 R1 R2 R3 U1 Value 0.1 F, 16 V, 20% 100 F, 16 V, Elec. 20% 820 pF, 16 V, 20% 10 k, 1/10 W, 5% 10 , 1/10 W, 5% 47 k, 1/10 W, 5% LM386 SI2400 Analog Input 0.1 F AIN/GPIO 1 Vrms Figure 5. Analog Input Circuit Rev. 0.95 11 S i2 40 0 Functional Description The SI2400 ISOmodem is a complete modem chipset with integrated direct access arrangement (DAA) that provides a programmable line interface to meet global telephone line requirements. Available in two 16-pin small outline packages, this solution includes a DSP data pump, a modem controller, an analog front end (AFE), a DAA, and an audio codec. The modem, which accepts simple modem AT commands, provides connect rates of up to 2400 bps, full-duplex over the Public Switched Telephone Network (PSTN) with V.42 hardware support through HDLC framing. To minimize handshake times, the SI2400 can implement a V.25-based fast connect feature. The modem also supports the V.23 reversing protocol as well as SIA and other alarm standard formats. As well as supporting the modem signalling protocols, the ISOmodem provides numerous additional features for embedded modem applications. The SI2400 includes full caller ID detection and decoding for the US, UK, and Japanese caller ID formats. Both DTMF decoding and generation are provided on chip as well. Call progress is supported both at a high level through echoing result codes and at a low level through user-programmable biquad filters and parameters such as ring period, ring on/off time, and dialing interdigit time. This device is ideal for embedded modem applications due to its small board space, low power consumption, and global compliance. The SI2400 solution integrates a silicon DAA using Silicon Laboratories' proprietary ISOcapTM technology. This highly integrated DAA can be programmed to meet worldwide PTT specifications for AC termination, DC termination, ringer impedance, and ringer threshold. The DAA also can monitor line status for parallel handset detection and for overcurrent conditions. The SI2400 is designed so that it may be rapidly assimilated into existing modem applications. The device interfaces directly through a UART to either a microcontroller or a standard RS-232 connection. This simple interface allows for PC evaluation of the modem immediately upon powerup via the AT commands across a standard hyperterminal. The chipset can be fully programmed to meet international telephone line interface requirements with full compliance to FCC, CTR21, JATE, and other countryspecific PTT specifications. In addition, the SI2400 has been designed to meet the most stringent worldwide requirements for out-of-band energy, billing-tone immunity, lightning surges, and safety requirements. The SI2400 solution needs only a few low-cost discrete components to achieve global compliance. See Figure 3 on page 9 for a typical application circuit. Table 11. Selectable Configurations Configuration V.21 V.22 V.22bis (1200 fallback) V.22bis V.23 FSK V.23 Bell 103 Bell 212A Security SIA--Pulse SIA Format FSK DPSK DTMF Pulse FSK 1300/1700 1170/2125 1200/2400 -- -- 1170/2125 600/75 300 1200 40 Low 300 half-duplex Modulation FSK DPSK DPSK QAM Carrier Frequency (Hz) 1080/1750 1200/2400 1200/2400 1200/2400 1300/2100 Data Rate (bps) 300 1200 1200 2400 1200/75 Standard Compliance Full Full Full No retrain* Full; plus reversing (Europe) Full Full Full Full 300 bps only *Note: The SI2400 only adjusts its baud rate for line conditions during the initialization of the call. Retraining to accommodate changes in line conditions which occur during a call must be implemented by terminating the call and redialing. 12 Rev. 0.95 SI2400 Digital Interface The SI2400 has an asynchronous serial port (UART) that supports standard microcontroller interfaces. After reset, the baud rate defaults to 2400 bps with the 8-bit data format described below. Immediately after powerup, the device must be programmed using the primary serial port because the secondary serial port is disabled by default. The CLKOUT clock will be running with a frequency of 9.8304 MHz. The baud rate of the serial link is established by writing S register SD (SE0.2:0). It may be set for 300, 1200, 2400, 9600, 19200, 228613, 245760, or 307200 bps. Immediately after the ATSE0=xx string is sent, the user must reprogram the host UART to match the selected new baud rate. The higher baud rate settings (>230400) can be used for transferring PCM data from the host to the SI2400 for transmission of voice data over the phone line or through the voice codec. data bits, and the line data format is 8 data bits (8N1), then the MSB from the link will be dropped as the 9-bit word is passed from the link side to the line side. In this case, the dropped ninth bit can then be used as an escape mechanism. However, if the link data format is 8 data bits and the line data format is 9 data bits, an MSB equal to 0 will be added to the 8-bit word as it is passed from the link side to the line side. The SI2400 UART does not continuously check for stop bits on the incoming digital data. Therefore, if the RXD pin is not high, the TXD pin may transmit meaningless characters to the host UART. This requires the host UART to flush its receiver FIFO upon initialization. SI2400 RXD TXD Link Data Rate: SD (SE0.2:0) Data Format: ND (SE0.3) Si3015 RJ11 UART Line Data Rate: S07 Data Format: S15 Table 12. Register S07 Examples: DTMF = 0, HDEN = 0, BD = 0 Modem Protocol V.21 Bell 103 V.22 Bell 212A V.22bis V.23 (75 tx, 1200 rx) V.23 (1200 tx, 75 rx) V.23 (75 tx, 600 rx) V.23 (600 tx, 75 rx) Register S07 Values 0x03 0x01 0x02 0x00 0x06 0x24 0x14 0x20 0x10 Figure 6. Link and Line Data Formats Command/Data Mode Upon reset, the modem will be in command mode and will accept AT-style commands. An outgoing modem call can be made using the "ATDT#" (tone dial) or "ATDP#" (pulse dial) command after the device is configured. If the handshake is successful, the modem will respond with the "c", "d", or "v" string and enter data mode. (The byte following the "c", "d", or "v" will be the first data byte.) At this point, AT-style commands are not accepted. There are three methods which may be used to return the SI2400 to command mode: ! Configurations and Data Rates The SI2400 can be configured to any of the Bell and CCITT operation modes. This device also supports SIA and other security modes for the security industry. Table 11 provides the modulation method, the carrier frequencies, the data rate, the baud rate and the notes on standard compliance for each modem configuration of the SI2400. Table 12 shows example register settings (SO7) for some of the modem configurations. As shown in Figure 6, 8-bit and 9-bit data modes refer to the link data format over the UART. Line data formats are configured through registers S07 and S15. If the number of bits specified by the link data format differs from the number of bits specified by the line data format, the MSBs will either be dropped or bit-stuffed, as appropriate. For example, if the link data format is 9 ! ! Use the ESC pin--To program the GPIO3 pin to function as an ESCAPE input, set GPIO3 (SE2.5:4) = 3. In this setting, a positive edge detected on this pin will return the modem to command mode. The "ATO" string can be used to reenter data mode. Use 9-bit data mode--If 9-bit data format with escape is programmed, a 1 detected on bit 9 will return the modem to command mode. (See Figure 2 on page 8.) This is enabled by setting ND (SE0.3) = 1 and NBE (S15.0) = 1. The "ATO" string can be used to reenter data mode. Use TIES--The time independent escape sequence is a sequence of three escape characters ("+" characters by default). Once these characters have been recognized, the modem enters the Command state without sending a confirming result code to the terminal. The modem then starts an internal prompt Rev. 0.95 13 S i2 40 0 delay timer. From that point on if an AT Note: TIES is not the recommended escape solution for the most robust designs. Any data strings that actually contain the escape character three times in a row will interrupt a data sequence erroneously. out onto the pin, LSB first. After 9 data bits, the stop bit follows. All bits are shifted out at the rate determined by the baud rate register. Once the baud rate register SD (SE0.2:0) is written, reception may begin at any time. The falling edge of a start bit on the RXD pin will begin the reception process. Data must be shifted in at the selected baud rate. The ninth data bit may be used to indicate an escape by setting NBE (S15.0) = 1. If so, this bit will normally be set to 0 when the modem is online. To go offline into command mode, set this bit to 1. The next frame will be interpreted as a command. Data mode can be reentered using the ATO command. After the middle of the stop-bit time, the receiver will go back to looking for a 1 to 0 transition on the RXD pin. Flow Control If a higher serial link line (UART) data rate is programmed than the baud rate of the modem, flow control is required to prevent loss of data to the transmitter. No flow control is needed if the same baud rate as modem rate is programmed. Note that in compliance with the V.22bis algorithm, the V.22bis (2400 baud) modem will connect at 1200 baud if it cannot make a 2400 baud connection. To control flow, the CTS pin is used. As shown in Figure 2 on page 8, the CTS pin will normally be high, and will be low whenever the modem is able to accept new data. The CTS pin will go high again as soon as a start bit is detected on the RXD pin and will remain high until the modem is ready to accept another character. Whether using an escape method or not, when the carrier is lost, the modem will automatically return to command mode and report "N". 8-Bit Data Mode This mode is asynchronous, full-duplex, and uses a total of 10 bits (shown in Figure 2 on page 8). To program 8-Bit Data mode, set ND (SE0.3) = 0. (Note that 8-Bit Data mode is the default.) The 10 bits consist of a start bit (logic 0), 8 data bits, and 1 stop bit (logic 1). Data transmission from the SI2400 to the host takes place on the TXD pin. It begins when the SI2400 lowers TXD, placing the start bit on the pin. Data is then shifted out onto the pin, LSB first. After 8 data bits, the stop bit follows. All bits are shifted out at the rate determined by the baud rate register. Once the baud rate register SD (SE0.2:0) is written, reception by the SI2400 may begin at any time. The falling edge of a start bit will signal to the SI2400 that the reception process has begun. Data should be shifted onto RXD at the selected baud rate. After the middle of the stop-bit time, the receiver will go back to looking for a 1 to 0 transition on the RXD pin. 9-Bit Data Mode This mode uses a total of 11 bits in UART communication. To program 9-Bit Data mode, set ND (SE0.3) = 1. The 11 bits consist of one start bit (logic 0), 9 data bits, and 1 stop bit (logic 1, see Figure 2 on page 8). As in 8-Bit Data mode, the transmissions occur on the TXD signal pin and receptions on the RXD pin. Data transmission from the SI2400 to the host takes place on the TXD pin. It begins when the SI2400 lowers TXD, placing the start bit on the pin. Data is then shifted 14 Low Power Modes The SI2400 has three low power modes. These are described below: ! ! ! DSP Powerdown. The DSP processor can be powered down by setting register PDDE (SEB.3) =1. In this mode the serial interface still functions as normal, and the modem will be able to detect ringing and intrusion. No modem modes or tone detection features will function. Wake Up On Ring. By issuing the "z" command, the SI2400 goes into a low power mode where both the microcontroller and DSP are powered down. Only incoming ringing or a total reset will power up the chip again. Total Powerdown. By writing registers PDN (SF1.6) and PDL (SF1.5), the SI2400 will be put into a total powerdown mode. In this mode, all logic is powered down, including the crystal oscillator and clock-out pin. Only a hardware reset can restart the SI2400. Rev. 0.95 SI2400 Global DAA Operation The SI2400 chipset contains an integrated silicon direct access arrangement (silicon DAA) that provides a programmable line interface to meet international telephone line interface requirements. Table 13 gives the DAA register settings required to meet international PTT standards. A detailed description of the registers in Table 13 can be found in "Appendix A--DAA Operation" on page 62. Table 13. Country-Specific Register Settings Register Country Australia Bulgaria CTR211 Czech Republic FCC Hungary Japan Malaysia2 New Zealand Philippines Poland3 Singapore2 Slovakia Slovenia South Africa3 South Korea3 SF5 OHS 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 SF7 RZ 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 SF6 VOL 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACT 1 1 1 1 0 0 0 0 1 0 0 0 1 1 1 0 DCT 2 2 3 2 2 2 1 1 2 1 2 1 2 2 2 1 RT 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 LIM 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 FNM 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 Note: 1. CTR21 includes the following countries: Austria, Belgium, Cyprus, Denmark, Finland, France, Germany, Greece, Iceland, Ireland, Israel, Italy, Liechtenstein, Luxembourg, Netherlands, Norway, Portugal, Spain, Sweden, Switzerland, and the United Kingdom. 2. Supported for loop current 20mA. 3. The RZ register (SF5.1) should only be set for Poland, South Africa and South Korea if the ringer impedance network (C15, R14, Z2, Z3) is not populated. Parallel Phone Detection The SI2400 has the ability to detect another phone that is off hook on a shared line. This allows the ISOmodem both the ability to avoid interrupting another call on a shared line and to intelligently handle an interruption when the SI2400 is using the line. An automatic algorithm to detect parallel phone intrusion (defined as an off-hook parallel handset) is provided by default. On-Hook Intrusion Detection The on-hook intrusion detection allows the user to avoid interrupting another call on a shared line. To implement the intrusion detection, the SI2400 uses a loop voltage sense (register LVCS (SDB)). When on hook, LVCS monitors the line voltage. (When off hook, it measures current.) LVCS has a full scale of 70 V with an LSB of 2.25 V. The first code (0 1) is skewed such that a 0 indicates that the line voltage is < 3.0 V. The voltage accuracy of LVCS is 20%. The user can read these bits directly when on hook through register LVCS. The automatic on-hook detector algorithm can be tripped by either an absolute level or by a voltage differential by selecting ONHD (S13.3). If the absolute detector is chosen, the SI2400 algorithm will detect an intrusion if LVCS is less than the on-hook intrusion Rev. 0.95 15 S i2 40 0 threshold, register AVL (S11.4:0). In other words, it is determined that an intrusion has occurred if LVCS < AVL. AVL defaults to 0x0D, or 30 V on powerup. The absolute detector is the correct method to use for FCC and most other countries. The absolute detector should also be used to detect the presence (or absence) of a line connection. Under the condition of a very short line and a currentlimiting telephone off hook, the off-hook line voltage can be as high as 40 V. The minimum on-hook voltage may not be much greater. This condition can occur on phone lines with current-limiting specifications such as France. For these lines, a differential detector is more appropriate. The differential detector method checks the status of the line every 26.66 ms. The detector compares (LVCS (t - 0.02666) - LVCS (t)) to the differential threshold level set in register DVL (S11.7:5). The default for DVL is 0x02 (5.25 V). If the threshold is exceeded (LVCS (t - 0.02666) - LVCS (t) > DVL), an intrusion is detected. If (LVCS (t) - LVCS (t - 0.02666) > DVL), then the intrusion is said to have terminated. 30 25 20 LVCS BIT 15 10 5 0 0 3 6 9 12 15 18 21 24 27 30 33 36 39 42 45 48 51 54 57 60 63 66 69 72 Loop Voltage 100 Figure 7. Loop Voltage--LVCS Transfer Function Off-Hook Intrusion Detection When the SI2400 is off hook, it can detect another phone going off hook by monitoring the DC loop current. The loop current sense transfer function is shown in Figure 8 with the upper curve representing CTR21 (current limiting) operation and the lower curve representing all other modes. The overload points indicate excessive current draw. The user can read these bits directly through register LVCS (SDB). Note that as in the line voltage sense, there is hysteresis between codes (0.375 mA for CTR21 mode and 0.75 mA for ROW). 16 Rev. 0.95 SI2400 Overload 30 25 20 LCS BIT 15 CTR21 10 5 0 0 3 6 9 12 15 18 21 24 27 30 33 36 39 42 45 48 51 54 57 60 63 66 69 72 75 78 81 84 87 90 93 Loop Current (mA) 140 Figure 8. Loop Current--LVCS Transfer Function The off-hook algorithm can be chosen to use either a differential current detector or an absolute current detector via setting OFHD (S13.4). Because of the extra code and host processing required by the absolute current method, the differential current method is chosen to be the default. This method uses two techniques to detect an intrusion. The first technique is described as follows: If (LVCS (t - 400 ms) - LVCS (t)) > DCL, then an intrusion is deemed to have taken place. If (LVCS (t) - LVCS (t - 400 ms)) > DCL, then the intrusion is deemed to have completed. Default DCL is 2. The second technique takes advantage of the DC holding circuit. If a parallel phone suddenly goes off hook, the DC holding circuit will not react immediately, therefore the loop current through the SI2400 will drop briefly to zero. Thus, an intrusion is also reported when LVCS = 0. If the absolute detector is chosen, the SI2400 will detect an intrusion under the condition that LVCS is less than the off-hook intrusion threshold, register ACL (S12.4:0). In other words, it is determined that an intrusion has occurred if LVCS < ACL. ACL defaults to 3 (15.5 mA) on powerup. Because the loop current can vary from 20 mA to 100 mA, depending on the line, a factory preset threshold is not useful. If the host wishes to use this absolute mode, the host must measure the line current and then set the threshold accordingly. A measurement of the loop current is accomplished by going off-hook (issuing the "ATDT;" command), reading LVCS after 50 ms, and going back on hook using the "ATH" command. This measured value of LVCS should be used to determine the threshold register ACL. If this method is used, the loop current should be measured on a periodic basis to account for drift in line resistance. The absolute current method is the most accurate, and it is necessary to use this method in order to determine if another phone goes off hook simultaneous with or immediately (< 400 ms) after the SI2400 phone goes off hook. It does, however, require processing by the host, including periodic off-hook events to measure the loop current. If an intrusion event is detected while in command mode, an "i" is echoed to the host; When it is terminated an "I" is echoed. The host may also be notified of an intrusion when in data mode through the ALERT pin by setting GPIO4 (SE2.7:6) = 3. Upon intrusion, the ALERT pin will go high, and the host may then read register IND (S14.1) to confirm an intrusion. The host may use the automatic intrusion detection algorithm (the default) by monitoring the ALERT pin or waiting for the character echoes. The host may also use the LVCS, AVL, and DVL registers as a basis for a custom algorithm. Note that LVCS only acts as a line voltage sense when on hook. When off hook, it becomes the line current sense register. Rev. 0.95 17 S i2 40 0 Carrier Detect/Loss The SI2400 can provide the functionality of a loss-ofcarrier pin similar to the CD pin functionality in an RS232 connection. If programmed as an ALERT, GPIO4 will go high in online mode when either parallel phone intrusion or a loss-of-carrier is detected. When used in this manner, the host detects a low-to-high transition on GPIO4 (ALERT), escapes into command mode, and reads register IND (S14.1). If high, IND indicates intrusion. If low, IND indicates loss-of-carrier. ID) or CIDB (S13.2) = 1 (Set modem to UK type caller ID) or JID (S13.7) = 1 (Set modem to Japanese type caller ID) 3. Set baud rate either to 1200 bps without flow control or greater than 1200 bps with flow control. Bellcore Caller ID Operation The SI2400 will detect the first ring burst signal and will echo an "R" to the host. The device will then start searching for the caller ID preamble sequence after the appropriate time-out. When 50 continuous mark bits have been detected, the "m" response will be echoed to indicate that the mark has been detected and that caller ID data will follow. At this point the algorithm will look for the first start bit, assemble the characters, and then transmit them out of the UART as they are detected. When the caller ID burst finishes, the carrier will be lost and the modem will echo an "N" to indicate that the carrier is lost. At this point the SI2400 will continue detecting ring bursts and echoing "R" for each burst, and will automatically answer after the correct number of rings. UK Caller ID Operation When the SI2400 detects a line reversal, it will echo an "f" to the host. It will then start searching for the Idle State Tone Alert Signal. When this signal has been detected, the SI2400 will transmit an "a" to the host. After the Idle State Tone Alert Signal is completed, the SI2400 will apply the wetting pulse for the required 15 ms by quickly going off hook and on hook. From this point on, the algorithm is identical to that of Bellcore in that it will search for the channel seizure signal and the marks before echoing an "m" and will then report the decoded caller ID data. Japan Caller ID Operation After a polarity reversal and the first ring burst are detected, the SI2400 is taken off hook. After 40 1s (marks) have been detected, the SI2400 will search for a start bit, echo an "m" for mark, and begin assembling characters and transmitting them out through the serial port. When the carrier is lost, the SI2400 immediately hangs up and echoes "N". Also, if no carrier is detected for three seconds, the line hangs up and echoes "N". Force Caller ID Monitor The SI2400 may be used to continuously monitor the phone line for the caller ID mark signals. This can be useful in systems that require detection of caller ID data before the ring signal, voice mail indicator signals, and Type II caller ID support. To force the SI2400 into caller ID monitor mode, set CIDM (S0C.5). Overcurrent Protection The SI2400 has built in protection to avoid damage to the device due to overcurrent situations. An example situation occurs when plugging the modem into a digital PBX outlet and attempting to go off-hook. Digital PBX systems vary, but many can provide a DC feed voltage of up to 70 V and therefore have the ability to deliver hundreds of milliamps of current into the DAA. The SI2400 will always go off hook with the currentlimiting mode enabled. This allows no possibility of damage for voltages up to about 48 V. However, at higher voltages the 43 V Zener protection device will begin to conduct and could be damaged if the power is applied for too long. The SI2400 will detect the value of the loop current at a programmable time after going off-hook (default = 20 ms) via register OHT (S32). If the loop current is too high, an "x" will be echoed back to the host to indicate a fault condition. The host may then check register OD (S14.3) to confirm an overcurrent condition and go back on hook if necessary. The user can optionally enable another protection feature, the overcurrent protection, via register AOC (S14.4). This protection feature can automatically detect an overcurrent condition and put the SI2400 into a lower drive mode, which is similar to the current-limiting mode but has reduced hookswitch drive. This feature allows the SI2400 to remain off-hook on a digital line for a longer period of time without damage. If the SI2400 does not detect overcurrent after the time set by OCDT (S32), then the correct line termination is applied. This method of going off hook in current-limiting mode can be disabled by clearing OFHE (S13.5). Caller ID Decoding Operation The SI2400 supports full caller ID detection and decode for US Bellcore, UK, and Japanese standards. To use the caller ID decoding feature, the following set-up is necessary: 1. Set ND (SEO.3) = 0 (Set modem to 8N1 configuration) 2. Set CIDU (S13.1) = 1(Set modem to Bellcore type caller 18 Rev. 0.95 SI2400 Tone Generation and Tone Detection The SI2400 provides comprehensive and flexible tone generation and detection. This includes all tones needed to establish a circuit connection and to set up and control a communication session. The tone generation furnishes the DTMF tones for PSTN auto dialing and the supervisory tones for call establishment. The tone detection provides support for call progress monitoring. The detector can also be user-programmed to recognize up to 16 DTMF tones and two tone detection bandpass filters. DTMF tones may be detected and generated by using the "ATA0" and "AT!0" commands described in the AT command section. A description of the userprogrammable tones can be found in "Modem Result Codes and Call Progress" on page 30. the high byte be sent first containing bits D13-D7. The LSB (B0) must equal zero. The low byte must be sent next containing bits D6-D0; the LSB (B0) must equal one. The receive data format is the same. In PCM data mode, the line can be answered using the "ATA;" command or a call can be originated using the "ATDT#;" command. (The ";" is used to keep the modem from leaving the command mode.) When PCM data mode is enabled (set PCM (S13.0) = 1 and DRT (SE4.5:4) = 0 (default)), data will immediately begin streaming into and out of the serial port at a 9600 Hz*2 word rate. In this mode, the controller will not detect dial tones or other call progress tones. If desired, the user can monitor these tones using manual call progress detection prior to entering the PCM data mode. To exit the PCM data mode, an escape must be performed either by pulsing the ESC pin or by using 9bit data mode and setting the ninth bit. (TIES cannot be used in PCM data mode.) The escape command will disable PCM streaming, and the controller will again accept AT style commands. Note: PCM data mode is the format that must also be used when the SI2400 is configured to run as a voice codec (DRT = 3). PCM Data Mode The SI2400 has the ability to bypass the modem algorithm and send 14-bit PCM data, sampled at 9600 Hz, across the DAA. To use this mode, it is necessary to set the serial link baud rate to at least 228613 bps (SE0), set PCM (S13.0) = 1, and set MCKR (E1.7:6) = 0. The data format (Figure 9) requires that PCM Receive Timing 8-Bit Data TXD Start B0 D7 B1 D8 B2 D9 B3 High-Byte D10 B4 D11 B5 D12 B6 D13 B7 Stop Start B0 D0 B1 D1 B2 Low-Byte D2 B3 D3 B4 D4 B5 D5 B6 D6 B7 Stop PCM Transmit Timing 8-Bit Data RXD Start B0 D7 B1 D8 B2 High-Byte D9 B3 D10 B4 D11 B5 D12 B6 D13 B7 Stop Start B0 D0 B1 D1 B2 Low-Byte D2 B3 D3 B4 D4 B5 D5 B6 D6 B7 Stop Note: Baud rates (programmed through register SE0) can be set to the following: 228613, 245760, and 307200. Figure 9. PCM Timing Rev. 0.95 19 S i2 40 0 Data Mode (DRT = 0) SI2400 DSP TX RXD DSPOUT Si3015 RJ11 RJ11 A. RX TXD DSPIN AOUT (Call Progress) AIN Voice Mode (DRT = 1) SI2400 DSP TX RXD DSPOUT Si3015 RJ11 RJ11 AIN AOUT (Voice Out) B. RX TXD DSPIN AIN (Voice In) Loopback Mode (DRT = 2) SI2400 DSP TX RXD DSPOUT C. RX TXD DSPIN AOUT AIN Codec Mode (DRT = 3) SI2400 DSP TX RXD DSPOUT Si3015 RJ11 D. RX TXD DSPIN AIN AOUT (Voice Out) AIN (Voice In) Figure 10. Signal Routing 20 Rev. 0.95 SI2400 Analog Codec The SI2400 features an on-chip, voice quality codec. The codec consists of a digital to analog converter (DAC) and an analog to digital converter (ADC). The sample rate for the codec is set to 9.6 kHz. When the codec is powered on (set register APO (SE4.1)=1), the output of the DAC is always present on the SI2400 AOUT pin. When the codec is powered off (APO = 0), a PWM output is present on the AOUT pin instead. In order to use the ADC, one of the four GPIO pins must be selected as an analog input (AIN) by programming the GPIO register (SE2). Figure 10 shows the various signal routing modes for the SI2400 voice codec, which are programmed through register DRT (SE4.5:4). Figure 10A shows the data routing for data mode. This is the default mode, which is used for the modem data formats. In this configuration, AOUT produces a mixed sum of the DSPOUT and DSPIN signals and is typically used for call progress monitoring through an external speaker. The relative levels of the DSPOUT and DSPIN signals that are output on the AOUT pin can be set through registers ATL (SF4.1:0) and ARL (SF4.3:2). Figure 10B shows the format for sending analog voice across the DAA to the PSTN. AIN is routed directly across the DAA to the telephone line. In this configuration, AOUT produces a mixed sum of the DSPOUT and DSPIN signals. The relative levels of the DSPOUT and DSPIN signals that are output on the AOUT pin can be set through registers ATL (SF4.1:0) and ARL (SF4.3:2). Note that the DSP may process these signals if it is not in PCM data mode. Thus, the DSP may be used in this configuration, for example, to decode DTMF tones. This is the mode used with the "!0" and "A0" commands. Figure 10C shows the loopback format, which can be used for in-circuit testing. A detailed description of the in-circuit test modes is described in the "Appendix A-- DAA Operation" on page 62. Figure 10D shows the codec mode. This format is useful, for example, in voice prompting, speaker phones, or any systems involving digital signal processing. In this mode, DSPOUT is routed to both the AOUT pin and to the telephone line, and AIN is routed directly to DSPIN. Note that in all the DRT formats, the DSP must be in PCM mode in order to pass DSPIN and DSPOUT directly to and from TXD and RXD. V.23 Operation/V.23 Reversing The SI2400 supports full V.23 operation including the V.23 reversing procedure. V.23 operation is enabled by setting MF8 (S07) = xx10xx00 or xx01xx00. If V23R (S07.5) = 1, then the SI2400 will transmit data at 75 bps and receive data at either 600 or 1200 bps. If V23T (S07.4) = 1, then the SI2400 will receive data at 75 bps and transmit data at either 600 or 1200 bps. BAUD (S07.2) is the 1200 or 600 bps indicator. BAUD = 1 will enable the 1200/600 V.23 channel to run at 1200 bps while BAUD = 0 will enable 600 bps operation. When a V.23 connection is successfully established, the modem will respond with a "c" character if the connection is made with the modem transmitting at 1200/600 bps and receiving at 75 bps. The modem will respond with a "v" character if a V.23 connection is established with the modem transmitting at 75 bps and receiving at 1200/600 bps. The SI2400 supports a V.23 turnaround procedure. This allows a modem that is transmitting at 75 bps to initiate a "turnaround" procedure so that it can begin transmitting data at 1200/600 bps and receiving data at 75 bps. The modem is defined as being in V.23 master mode if it is transmitting at 75 bps and it is defined as being in slave mode if the modem is transmitting at 1200/600 bps. The following paragraphs give a detailed description of the V.23 turnaround procedure. Modem in master mode To perform a direct turnaround once a modem connection is established, the host goes into onlinecommand-mode by sending an escape command (Escape pin activation, TIES, or ninth bit escape) to the master modem. (Note that the host can initiate a turnaround only if the SI2400 is the master.) The host then sends the ATRO command to the SI2400 to initiate a V.23 turnaround and to go back to the online (data) mode. The SI2400 will then change its carrier frequency (from 390 Hz to 1300 Hz), and wait for detecting a 390 Hz carrier for 440 ms. If the modem detects more than 40 ms of a 390 Hz carrier into a time window of 440 ms, it will echo the "c" response character. If the modem does not detect more than 40 ms of a 390 Hz carrier into a time window of 440 ms, it will hang up and echo the "N" (no carrier) character as a response Modem in slave mode The SI2400 performs a reverse turnaround when it detects a carrier drop longer than 20 ms. The SI2400 then reverses (it changes its carrier from 1300 Hz to 390 Hz) and waits to detect a 1300 Hz carrier for 220 ms. If the SI2400 detects more than 40 ms of a Rev. 0.95 21 S i2 40 0 1300 Hz carrier in a time window of 220 ms, then it will set the ALERT pin (GPIO4 must be configured as ALERT) and the next character echoed by the SI2400 will be a "v". If the SI2400 does not detect more than 40 ms of the 1300 Hz carrier in a time window of 220 ms, then it reverses again and waits to detect a 390 Hz carrier for 220 ms. Then, if the SI2400 detects more than 40 ms of a 390 Hz carrier in a time window of 220 ms, it will set the ALERT pin and the next character echoed by the SI2400 will be a "c". At this point, if the SI2400 does not detect more than 40 ms of the 390 Hz carrier in a time window of 220 ms, then it will hang up, set the ALERT pin, and the next character echoed by the SI2400 will be an "N" (no carrier). Successful completion of a turnaround procedure in either master or slave will automatically update V23T (S07.4) and V23R (S07.5) to indicate the new status of the V.23 connection. In order to avoid using the ALERT pin, the host may also be notified of the ALERT condition by using 9-bit data mode. Setting NBE (S15.0) = 1 and 9BF (C.3) = 0 will configure the ninth bit on the SI2400 TXD path to function exactly as the ALERT pin has been described. HDLC format. On the transmit side, if no data is available from the host, the HDLC flag pattern is sent repeatedly. When data is available, the SI2400 computes the CRC code throughout the frame and the data is sent with the HDLC zero-bit insertion algorithm. HDLC flow control operates in a similar manner to normal asynchronous flow control across the UART and is shown in Figure 11. In order to operate flow control (using the CTS pin to indicate when the SI2400 is ready to accept a character), a higher serial link baud rate than the transmission line rate should be selected. The method of transmitting HDLC frames is as follows: 1. After the call is connected, the host should begin sending the frame data to the SI2400, using the CTS flow control to ensure data synchronicity. A 1-deep character FIFO is implemented in the SI2400 to ensure that data is always available to transmit. 2. When the frame is complete, the host should simply stop sending data to the SI2400. As shown in Figure 11B, since the SI2400 does not yet recognize the end-of-frame, it will expect an extra byte and assert CTS. If CTS is used to cause a host interrupt, then this final interrupt should be ignored by the host. 3. When the SI2400 is ready to send the next byte, if it has not yet received any data from the host, it will recognize this as an end-of-frame, raise CTS, calculate the final CRC code, transmit the code, and begin transmitting stop flags. 4. After transmitting the first stop flag, the SI2400 will lower CTS indicating that it is ready to receive the next frame from the host. At this point the process repeats as in step 1. V.42 HDLC Mode The SI2400 supports V.42 through HDLC framing in hardware in all modem data modes. Frame packing and unpacking, including opening and closing flag generation and detection, CRC computation and checking, zero insertion and deletion, and modem data transmission and reception are all performed by the SI2400. V.42 error correction and data compression must be performed by the host. The digital link interface in this mode uses the same UART interface (8-Bit Data and 9-Bit Data formats) as in the asynchronous modes and the ninth data bit may be used as an escape by setting NBE (S15.0) = 1. When using HDLC in 9-Bit Data mode, if the ninth bit is not used as an escape, it is ignored. To use the HDLC feature on the SI2400, the host must first enable HDLC operation by setting HDEN (S07.7) = 1. Next, the host may initiate the call or answer the call using either the "ATDT#", the "ATA" command, or the auto-answer mode. (The auto-answer mode is implemented by setting register NR (S0) to a non-zero value.) When the call is connected, a "c", "d", or a "v" is echoed to the host controller. The host may now send/receive data across the UART using either the 8-Bit Data or 9-Bit Data formats with flow control. At this point, the SI2400 will begin framing data into the 22 The method of receiving HDLC frames is as follows: 1. After the call is connected, the SI2400 searches for flag data. Then, once the first non-flag word is detected, the CRC is continuously computed, and the data is sent across the UART (8-Bit Data or 9-Bit Data mode) to the host after removing the HDLC zero-bit insertion. The baud rate of the host must be at least as high as that of data transmission. HDLC mode only works with 8-bit data words; the ninth bit is used only for escape on RXD and EOFR on TXD. 2. When the SI2400 detects the stop flag, it will send the last data word in the frame as well as the two CRC bytes and determine if the CRC checksum matches or not. Thus, the last two bytes are not frame data, but are the CRC bytes, which can be discarded by the host. If the checksum matches, then the SI2400 echoes "G" (good). If the checksum does not match, the SI2400 echoes "e" (error). Additionally, if the SI2400 detects an abort (seven or more contiguous ones), then it will echo an "A". When the "G", "e", or "A" (referred to as a frame result word) is sent, the SI2400 raises the EOFR (end of frame receive) pin (see Figure 10B). The GPIO1 pin must be configured as EOFR by setting GPE (SE4.3) = 1. In addition to using the EOFR pin to indicate that the byte is a Rev. 0.95 SI2400 frame result word, if in 9-bit data mode (set NBE (S15.0) = 1), the ninth bit will be raised if the byte is a frame result word. To program this mode, set 9BF (S0C.3) = 1 and ND (SEO.3) = 1. 3. When the next frame of data is detected, EOFR is lowered and the process repeats at step 1. Clock Generation Subsystem The SI2400 contains an on-chip clock generator. Using a single master clock input, the SI2400 can generate all modem sample rates necessary to support V.22bis, V.22/Bell212A, and V.21/Bell103 standards as well as a 9.6 kHz rate for audio playback. Either a 4.9152 MHz clock on XTALI or a 4.9152 MHz crystal across XTALI and XTALO form the master clock for the SI2400. This clock source is sent to an internal phase-locked loop (PLL) which generates all necessary internal system clocks. The PLL has a settling time of ~1 ms. Data on RXD should not be sent to the device prior to settling of the PLL. A CLKOUT pin exists whereby a 78.6432 MHz/(N + 1) clock is produced which may be used to clock a microcontroller or other devices in the system. N may be programmed via CLKD (SE1.4:0) to any value from 1 to 31, and N defaults to 7 on power-up. The clock may be stopped by setting N = 0. The MCKR (microcontroller clock rate register SEI.7:6) allows the user to control the microcontroller clock rate. On powerup, the SI2400 UART baud rate is set to 2400 bps, given that the clock input is 4.9152 MHz. The MCKR register conserves power via slower clocking of the microcontroller for specific applications where power conservation is required. Table 14 shows the configurations for different values of MCKR. Note that if MCKR = 0, then all of the serial interface link rates will run at either half (MCKR = 1) or quarter (MCKR = 2,3) speed. To summarize, the host will begin receiving data asynchronously from the SI2400. When each byte is received, the host should check the EOFR pin (or the ninth bit). If the pin (or the ninth bit) is low, then the data is valid frame data. If the pin (or the ninth bit) is high, then the data is a frame result word. Fast Connect In modem applications that require fast connection times, it is possible to expedite the handshaking by bypassing the answer tone. The No Answer Tone (NAT) bit (S33.1) is intended to provide a method to decrease the time needed to complete modem handshaking. If the NAT bit is set, the SI2400 will bypass transmitting a 2100 Hz or 2225 Hz answer tone when receiving a call. Instead, the modem will immediately begin the handshaking sequence that normally follows answer tone transmission. For example, when the modem is configured as a V.22 answering modem, activating the NAT bit will cause the modem to immediately transmit unscrambled ones at 1200 bps after the modem connects to the line. In addition, register UNL (S20) may be used to set the length of time that the modem transmits unscrambled ones. Setting UNL to a value lower than the default may also shorten the answer sequence. When the modem is set up to originate a call, setting the NAT bit causes the modem to bypass the normal answer tone search. Instead, the modem will send the transmit sequence that normally occurs after receiving the answer tone within 20 ms of the start of the answer tone. For example, when the modem is configured as a V.22 originating modem, activating the NAT bit will cause the modem to start transmitting scrambled ones at 1200 bps within 20 ms of the start of an answer tone. When NAT=0, additional modem handshaking control can be adjusted through registers TATL (S1E), ATTD (S1F), UNL (S20), TSOD (S21), TSOL (S22), VDDL (S23), VDDH (S24), SPTL (S25), VTSO (S26), VTSOL (S27), VTSOH (S28), RSO (S2A), FCD (S2F), FCDH (S30), RATL (S31), TASL (S34), and RSOL (S35). These registers can be especially useful if the user has control of both the originating and answer modems. Table 14. MCKR Configurations MCKR Modes Working All modes 0 (9.8304 MHz) 1 All modes except (4.9152 MHz) PCM streaming and V22bis 2,3 Command modes (2.4576 MHz) only Rev. 0.95 23 S i2 40 0 Host begins frame N Host finished sending frame N Host begins frame N + 1 RXD Start SI2400 ready for byte 1 of frame N Frame N (CTS used as normal flow control) Stop SI2400 detects end of frame N SI2400 ready for byte 1 of frame N + 1 Start Frame N + 1 CTS Note: Figure not to scale A. Frame Transmit TXD Start Receive Data Stop Start CRC Byte 1 Stop Start CRC Byte 2 Stop Start Stop Frame Result Word EOFR (or bit 9) B. Frame Receive Figure 11. HDLC Timing 24 Rev. 0.95 SI2400 AT Command Set The SI2400 supports a subset of the AT command set as it is intended to be used with a dedicated microcontroller instead of the complete set required for general terminal entry applications. Command lines are typed to the modem when the modem is in the Idle or Command state. Syntax for the AT commands is case-sensitive. A command line is defined as a string of characters starting with the "A" and "T" characters and ending with a special end-of-line character, Table 15. AT Command Set Summary Command A DT# DP# E H I M O RO S w## r# m# Z z Function Answer Line Immediately with Modem Tone Dial Number Pulse Dial Number Local Echo On/Off Hangup/Go On Line Return Product Code + Chip Revision Speaker Control Options Return Online V.23 Reverse Read/Write S Registers Write S-Register in Binary Read S-Register in Binary Monitor S-Register in Binary Software Reset Wakeup on Ring Command Line Execution The characters in a command line are executed one at a time. Unexpected command characters will be ignored, but unexpected data characters may be interpreted incorrectly. After the modem has executed a command line, the result code corresponding to the last command executed is returned to the terminal or host. The commands which warrant a response (e.g., "ATSR?") or "ATI" must be the last in the string and followed by a AT Command Set Description Answer The "A" command makes the modem go off hook and respond to an incoming call. This command is to be executed after the SI2400 has indicated that a ring has occurred. (The SI2400 will indicate an incoming ring by echoing an "R".) This command is aborted if any other character is transmitted to the SI2400 before the answer process is completed. Auto answer mode is entered by setting NR (S0) to a nozero value. NR indicates the number of rings before answering the line. Upon answering, the modem communicates by whatever protocol has been determined via the modem control registers in S07. If no transmit carrier signal is received from the calling modem within the time specified in CDT (S39), the modem hangs up and enters the idle state. < CR > End Of Line Character This character is typed to end a command line. The value of the Rev. 0.95 25 S i2 40 0 D DT# DP# Dial Tone Dial Number. Pulse Dial Number. M3 Speaker on after last digit dialed, off at carrier detect. O Return to Online Mode This command returns the modem to the online mode. It is frequently used after an escape sequence to resume communication with the remote modem. RO Turn-Around This command initiates a V.23 "direct turnaround" sequence and returns online. S SR=N Write an S register. This command writes the value "N" to the S-register specified by "R". "R" is a hexidecimal number, and "N" must also be a hexadecimal number from 00-FF. This command does not wait for a carriage return Note: Two digits must always be entered for both "R" and "N". The D commands make the modem dial a telephone call according to the digits and dial modifiers in the dial string following the commands. A maximum of 64 digits is allowed. A DT command performs tone dialing, and a DP command performs pulse dialing. The "ATS07=40DT;" command can be used to go off hook without dialing. The dial string must contain only the digits "0-9", "*", "#", "A", "B", "C", "D", or the modifiers ";", "/", or ",". Other characters will be interpreted incorrectly. The modifier "," causes a two second delay in dialing. The modifier "/" causes a 125 ms delay in dialing. The modifier ";" returns the device to command mode after dialing and it must be the last character. If any character is received by the SI2400 between the ATDT# 26 S Register Control SR? Read an S register. This command causes the SI2400 to echo the value of the S-register specified by R in hex format. R must be a hexidecimal number. Note: Two digits must always be entered for R. w## Write S Register in Binary This command writes a register in binary format. The first byte following the "w" is the address in binary format and the second byte is the data in binary format. This is a more rapid method to write registers than the "SR=N" command and is recommended for use by a host microcontroller. r# Read S Register in Binary This command reads a register in binary format. The byte following the "r" is the address in binary format. The modem will echo the contents of this register in binary format. This is a more rapid method to read registers than the "SR?" command and is recommended for use by a host microcontroller. Notes: When using this command, the modem result codes should be disabled by setting MRCD (S14.7) = 1. This ensures that the host will not confuse a result code with data being read. w## and r# are not required to be on separate lines (i.e., no Rev. 0.95 SI2400 m# Monitor S Register in Binary This command monitors a register in binary format. The byte following the "m" is the address in binary format. The SI2400 constantly transmits the contents of the register at the set baud rate until a new byte is transmitted to the device. The new byte is ignored and viewed as a stop command. The modem result codes should be disabled (as described above in r#) before using this command. Z Software Reset The "Z" command causes a software reset to occur in the device whereby all registers will return to their default power up value. If other commands follow on the same line, another AT is needed after the "Z" (e.g., ATZATS07=06 Extended AT Commands for the Alarm Industry In addition to the AT command set used to make a data modem connection, the SI2400 also supports a complete set of commands required for making calls and connections in security industry systems. These commands are summarized in Table 16. A0 After answering, connect AIN analog signal to phone line transmit signal and output the phone line receive signal to the AOUT pin (See Figure 10B). Also, this mode monitors for DTMF received digits and the user defined frequencies. A digit is reported by echoing the character received. Transmission of any data to the SI2400 UART will cause the modem to go into command mode. Once in command mode, the modem may be disconnected with the "ATH" command, or DTMF tones may be generated by using the "ATDT#" command. (In this case, "ATDT#" does not initiate a new call because the SI2400 has not been hung up and is still online.) Online mode can be resumed by issuing the "ATO" command. (User-defined frequencies are reported as X and Y for user defined frequencies 1 and 2, respectively. To enable user-defined frequencies, set UDF (S14.6) = 1.) Setting the user-defined frequencies requires DSP low-level control. A1 Answer line and follow the "SIA Format" protocol for Alarm System Communications at 300 bps (see !2). !0 After dialing the number, go into DTMF monitor mode (no modem connection). After dialing is complete, the connection is exactly the same as for the "AO" command. Note: When using "!" commands, the first instance of "!" must be on the same line as the "ATDT#" or "ATDP#". Table 16. AT Command Set Extensions for Alarm Industry Command A0 A1 !0 !1 !2 !3 !4 !5 !6 X1 X2 X3 Function Answer and switch to DTMF monitor mode Answer and switch to "SIA Format" Dial and switch to DTMF monitor mode Dial and switch to DTMF security mode Dial and switch to "SIA Format" Dial and switch to GDC--P1 Dial and switch to GDC--P2 Dial and switch to GDC--P3 Dial and switch to GDC--P4 SIA half-duplex mode search SIA half-duplex return online as transmitter SIA half-duplex return online as receiver !1 Dial number and follow the DTMF security protocol. "#" is the DTMF message to transmit. The modem dials the phone number and then echoes "r", "b", and "c" as appropriate. "c" echoes only after the SI2400 detects the Handshake Tone. After a 250 ms wait, the modem sends the DTMF tones. Next, the modem searches for a Kissoff tone. If the Kissoff tone is detected, the SI2400 echoes a "K" and the controller may begin sending the next message. The message should end with a Rev. 0.95 27 S i2 40 0 In order to send another message, the SI2400 must begin to receive the next message from the host within 250 ms of echoing the "K". The next message must be proceeded by the "!" character. To resend the same message, the host can transmit a "~". After the SI2400 echoes the "K", any character other than "!" or "~" indicates an abort to the SI2400, and it will exit into command mode, echoing an "O". Note that this aborts the sending process, but the modem remains off-hook. Multiple messages may be sent in this manner. If the Kissoff tone is not detected by the SI2400 within 1.25 seconds, it will echo with a "^". In this case, the host may transmit a "~" after the "^" and the message will be resent. Notes: 1. While the DTMF message is being sent, the SI2400 is not in command mode. No characters should be transmitted to the SI2400 during this time. The only exceptions are the "!" and "~" characters, which have special meanings as described above. If any other character is transmitted it is ignored, the message is aborted, and the SI2400 returns to command mode expecting AT commands. 2. The escape pin or ninth bit has no effect in security modes. 3. A second kissoff tone detector has been added that will return the character "k" if a kissoff tone longer than the value stored in KTL (S36) is detected (default = 1 second). 4. Setting (S0C.0) will cause a "." character to be echoed when the DTMF tone is turned on and the "/" character to be echoed when the tone is turned off. This can help give the controller an indication of the progress of the message transmission. 5. This command may also be used without being proceeded by the ATDT command. Thus, transmitting an "AT!1#" will immediately send the "#" message without dialing. 3. If a positive (negative) acknowledgment is detected a "P" ("N") is displayed once the tone has been detected for 400 ms. 4. The modem is still in command mode at this point. It can be put back online as a transmitter by issuing the "ATX2" command, or put online as a receiver by issuing the "ATX3" command. This sequence can be repeated to send long messages. Notes: 1. If tonal acknowledgment is not used, and the host wants to reverse the line, it can issue an escape and immediately program "ATX2" or "ATX3" to reverse the data direction. 2. Ninth bit escape does not operate in security modes. This command may also be used without being proceeded by the "ATDT" command. Thus, transmitting an "AT!2#" will immediately send the "#" message without dialing. !3 Dial the phone number and transmit the message according to the Generic SIA pulse format P1 protocol. After the handshake tone, the SI2400 responds with "c" and then transmits the message with the correct timing. When the message is sent, the device waits for the kissoff tone. If a kissoff tone is detected, the modem echoes a "K" and enters command mode. If no kissoff tone is detected and the Inter-Round time (S36) timeout has expired, then the SI2400 echoes a "^". To resend the message, the host can respond with "~" after receiving the "^". If not, the host can respond with "O" to enter command mode. In these modes, setting (SC.0) causes a "." to be echoed when the tone is turned on and a "/" to be echoed when the tone is turned off. This can help give the controller an indication of how the message is progressing. Note: Max number digits = 64 including phone number and !3 command !2 After dialing the number, follow the "SIA Format" protocol for Alarm System Communications. The signaling speed is set to 300 bps. The modem dials the phone number and then echoes "r" and "b" as appropriate. Once the handshake tone is detected, the speed synchronization signal is sent, and an acknowledge "c" is echoed. The modem is then put online in half-duplex FSK. After the "c" is received by the host, the host can then send the first SIA block. Once the host has transmitted the SIA block, it can monitor for the acknowledge tone by completing the following sequence: 1. The SI2400 should be put in command mode by issuing an escape (pulsing the escape pin). 2. At this point the "ATX1" command may be issued. This causes the modem to turn off the transmitter and begin monitoring for the acknowledgment tones. !4 This command is identical to S3 except pulse format P2 is used. !5 This command is identical to S3 except pulse format P3 is used. !6 This command is identical to S3 except pulse format P4 is used. Note: Commands "AT!3#", "AT!4#", "AT!5#", and "AT!6#" may also be used without being preceded by the "ATDT" command. For example, transmitting an "AT!6#" will immediately send the # message without dialing. 28 Rev. 0.95 SI2400 X1 Search for positive and negative acknowledge tones in SIA half-duplex 300 bps mode. The SI2400 will respond with "P" when a positive acknowledge is detected and "N" when a negative acknowledge is detected. X2 Return to online mode in SIA half-duplex mode as transmitter. X3 Return to online mode in SIA half-duplex mode as receiver. Table 17. SI2400 Global Ringer and Busy Tone Cadence Settings Country Australia Austria Belgium Brazil China Denmark Finland France Germany Great Britain Greece Hong Kong, New Zealand India Ireland Italy, Netherlands, Norway, Thailand, Switzerland, Israel Japan, Korea Malaysia Mexico Portugal Singapore Spain Sweden Taiwan U.S., Canada (default) RTON 7 18 18 18 18 14 14 28 18 6 18 7 7 7 18 18 8 18 18 7 28 18 18 38 RTOF 3 93 56 75 75 140 93 65 75 3 75 4 3 4 75 37 4 75 93 4 56 93 37 75 Rev. 0.95 RTOD 1 10 6 8 8 15 10 7 8 2 8 1 1 1 8 4 1 8 10 1 6 10 4 7 BTON 37 30 50 25 35 25 30 50 50 37 30 50 75 50 50 50 35 25 50 75 20 25 50 50 BTOF 37 30 50 25 35 25 30 50 50 37 30 50 75 50 50 50 65 25 50 75 20 25 50 50 BTOD 4 3 5 3 4 3 3 5 5 4 3 5 8 5 5 5 7 3 5 8 2 3 5 15 29 S i2 40 0 Modem Result Codes and Call Progress Table 18 shows the modem result codes which can be used in call progress monitoring. All result codes are only a single character in order to speed up the communication and ease processing by the host. Table 18. Modem Result Codes (Continued) x ^ , Overcurrent State Detected After an Off-Hook Event Kissoff tone detection required Dialing Complete Table 18. Modem Result Codes Automatic Call Progress Detection Command a b c d f H I i K L l m N n O R r S t v Function British Telecom Caller ID Idle Tone Alert Detected Busy Tone Detected Connect Connect 1200 bps (when programmed as V.22bis modem) Hookswitch Flash or Battery Reversal Detected Modem Automatically Hanging Up in Japan Caller ID Mode On-Hook Intrusion Completed (phone back on hook) On-Hook Intrusion Detected (phone off-hook on the line) SIA Contact ID Kissoff Tone Detected Phone Line Detected No Phone Line Detected Caller ID Mark Signal Detected No Carrier Detected No Dial tone (time-out set by CW (S02)) Modem OK Response Incoming Ring Signal Detected Ringback Tone Detected Resending SIA Contact ID Data Dial Tone Connect 75 bps (V.23 only) The SI2400 has the ability to detect dial, busy and ringback tones automatically. The following is a description of the algorithms that have been implemented for these three tones. 1. Dial Tone. The dial tone detector looks for a dial tone after going off hook and before dialing is initiated. This can be bypassed by enabling blind dialing (set BD (S07.6) =1). After going off hook, the SI2400 waits the number of seconds in DW (S01) before searching for the dial tone. In order for a dial tone to be detected, it must be present for the length of time programmed in DTT (SIC). Once the dial tone is detected, dialing will commence. If a dial tone is not detected for the time programmed in CW (S02), the SI2400 will hangup and echo an "N" to the user. 2. Busy / Ringback Tone. After dialing has completed, the SI2400 monitors for Busy/Ringback and modem answer tones. The busy and ringback tone detectors both use the call progress energy detector. SI2400 register settings for global cadences for busy and ringback tones are listed in Table 17, including the default settings for registers BTON (S16), BTOF (S17), BTOD (S18), RTON (S19), RTOF (S1A), and RTOD (S1B). Manual Call Progress Detection Because other call progress tones beyond those described above may exist, the SI2400 supports manual call progress. This requires the host to read and write the low-level DSP registers and may require realtime control by the host. Manual call progress may be required for detection of application-specific ringback, dial tone, and busy signals. Note: Manual call progress requires DSP low-level control. The section on DSP low level control should be read before attempting manual call progress detection. To use this mode, the automatic modem responses should be disabled by setting MRCD (S14.7) = 1. The call progress biquad filters can be programmed to have a custom desired frequency response and detection level (as described in "Modem Result Codes and Call Progress" ). Four dedicated user-defined frequency detectors can be programmed to search for individual tones. The four detectors have center frequencies which can be set through registers UDFD1-4 (see Table 20). TDET (SE5 (SE8 = 0x02) Read Only Definition) can be monitored, Rev. 0.95 30 SI2400 along with TONE, to detect energy at these userdefined frequencies. The trip-threshold for UDFD1-4 is -30 dBm. By issuing the "ATDT;" command, the modem will go off hook and return to command mode. The user can then put the DSP into call progress monitoring by first setting SE8 = 0x02. Next, set SE5 = 0x00 so no tones are transmitted, and set SE6 to the appropriate code, depending on which types of tones are to be detected. At this point, users may program their own algorithm to monitor the detected tones. If the host wishes to dial, it should do so by blind dialing, setting the dial timeout PW (SO1) to 0 seconds, and issuing an "ATDT#;" command. This will immediately dial and return to command mode. Once the host has detected an answer tone using manual call progress, the host should immediately execute the "ATA" command in order to make a connection. This will cause the SI2400 to search for the modem answer tone and begin the correct connect sequence. In manual call progress, the DSP can be programmed to detect specific tones. The result of the detection is reported into SE5 (SE8 = 0x2) as explained above. The output is priority encoded such that if multiple tones are detected, the one with the highest priority whose detection is also enabled is reported (see SE5 (SE8=02) Read Only). In manual call progress, the DSP can be programmed to generate specific tones (see TONC register SE5 (SE8 = 02) Write Only). For example, setting TONC = 6 will generate the user-defined tone as indicated by UFRQ in Table 20 with an amplitude of TGNL. Table 19 shows the mappings of SI2400 DTMF values, keyboard equivalents, and the related dual tones. DTMF Code 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Table 19. DTMF Keyboard Equivalent 0 1 2 3 4 5 6 7 8 9 D * # A B C Tones Low 941 697 697 697 770 770 770 852 852 852 941 941 941 697 770 852 High 1336 1209 1336 1477 1209 1336 1477 1209 1336 1477 1633 1209 1477 1633 1633 1633 Rev. 0.95 31 S i2 40 0 Low Level DSP Control Although not necessary for most applications, the DSP low-level control functions have been made available for users with very specific requirements who must control the DSP more directly. DSP word requires two writes from the host. When SE8 = 1, SE5 represents the 8 LSBs of the word, and SE6.5:0 represents the 6 MSBs. Tables 20 and 21 define the DSP registers. Note: SE8=0 and SE8=1 must be used only when the modem is not already "online." DSP Registers The DSP registers may be accessed through the SI2400 microcontroller. S-registers SE5, SE6, SE7, and SE8 are used to read and write the DSP registers. The definition of SE5 and SE6 both depend on the value of SE8 and whether they are being read or written. Both of these conditions are given in the register definitions for SE5 and SE6 (see "S Registers" on page 35). When SE8 = 0 or 1, SE5 and SE6 are defined directly as the address (SE8 = 0) and data (SE8 = 1) of the internal DSP registers. The address field is 8 bits wide. As shown in Tables 20 and 21, DSP address values range from 0x02 to 0x0B and from 0x10 to 0x23. To write an address, set SE8 = 0 and then write the DSP address to register SE5 and SE6. Writing any other DSP addresses than those shown in Tables 20 and 21 may cause unpredictable behavior by the DSP. The DSP data field is 14 bits wide. Thus, writing a single Example1: The user would like to program call progress filter coefficient A2_k0 (0x15) to be 309 (0x135). Host Command: ATSE8=00SE6=00SE5=15SE8=01SE6=01SE5=35SE8=00 In the command above, ATSE8=00 sets up registers SE5 and SE6 as DSP address registers. SE6=00 sets the high bits of the address, and SE5=15 sets the low bits. SE8=01 sets up registers SE5 and SE6 as DSP data registers for the previously written DSP address (0x15). SE6=01 sets the high 6 bits of the 14-bit data word, and SE5=35 sets the low 8 bits of the 14-bit data word. When SE8=2, depending on whether the host is reading or writing, SE5 and SE6 are as defined in the S-register tables. Table 20. Low-Level DSP Parameters DSP Register Address 0x02 0x03 0x04 0x05 Name XMTL DTML DTMT UFRQ Description DAA modem full scale transmit level, default = -10 dBm DTMF high tone transmit level, default = -5 dBm DTMF twist ratio (low/high), default = -2 dBm User-defined transmit tone frequency. See register SE5 (SE8=0x02 (Write Only)) Call progress detect level (see Figure 12), default = -34 dBm User-defined frequency detector 1. Center frequency for detector 1. User-defined frequency detector 2. Center frequency for detector 2. User-defined frequency detector 3. Center frequency for detector 3. Rev. 0.95 Function Level = 20log10 (XTML/4096) -10 dBm Level = 20log10 (DTML/5157) -5 dBm Level = 20log10 (DTMT/3277) -2 dB f = (9600/512) UFRQ (Hz) Default 4096 5157 3277 91 0x06 0x07 0x08 0x09 CPDL UDFD1 UDFD2 UDFD3 Level = 20log10 (4096/CPDL) -34 dBm UDFD1 = 8192 cos (2 f/9600) UDFD2 = 8192 cos (2 f/9600) UDFD3 = 8192 cos (2 f/9600) 4096 4987 536 4987 32 SI2400 Table 20. Low-Level DSP Parameters (Continued) DSP Register Address 0x0A 0x0B Name UDFD4 TGNL Description User-defined frequency detector 4. Center frequency for detector 4. Tone generation level associated with TONC (SE5 (SE8 = 0x02) Write Only Definition), default = -10 dBm Function UDFD4 = 8192 cos (2 f/9600) Level = 20log10 (TGNL/2896) - 10 dBm Default 536 2896 Call Progress Filters The programmable call progress filters coefficients are located in DSP address locations 10H through 23H. There are two independent 4th order filters A and B, each consisting of two biquads, for a total of 20 coefficients. Coefficients are 14 bits (-8192 to 8191) and are interpreted as, for example, b0 = value/4096, thus giving a floating point value of approximately -2.0 to 2.0. Output of each biquad is calculated as w[n] = k0 * x[n] + a1 * w[n - 1] + a2 * w[n - 2] y[n] = w[n] + b1 * w[n - 1] + b2 * w[n - 2]. The output of the filters is input to an energy detector and then compared to a fixed threshold with hysteresis (DSP register CPDL). Defaults shown are a bandpass filter from 80-650 Hz (-3 dB). These registers are located in the DSP and thus must be written in the same manner described in "Modem Result Codes and Call Progress" on page 30. The filters may be arranged in either parallel or cascade through register CPCD (SE6.6 (SE8=0x02)), and the output of filter B may be squared by selecting CPSQ (SE6.7 (SE8=0x02)). Figure 12 shows a block diagram of the call progress filter structure. Table 21. Call Progress Filters DSP Register Address 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F 0x20 0x21 0x22 0x23 Coefficient A1_k0 A1_b1 A1_b2 A1_a1 A1_a2 A2_k0 A2_b1 A2_b2 A2_a1 A2_a2 B1_k0 B1_b1 B1_b2 B1_a1 B1_a2 B2_k0 B2_b1 B2_b2 B2_a1 B2_a2 Default 1024 -2046 1024 7737 -3801 309 10 309 7109 -3565 1024 -2046 1024 7737 -3801 309 10 309 7109 -3565 Rev. 0.95 33 S i2 40 0 0 CPCD 1 Filter Input Filter B Energy Detect 0 1 0 CPCD 1 0 CPSQ y = x2 B A Max (A,B) A Hysteresis B A > B? TDET Filter A Energy Detect 20log10(4096/CPDL) -34 dBm Figure 12. Programmable Call Progress Filter Architecture 34 Rev. 0.95 SI2400 S Registers Note: Any register not documented here is reserved and should not be written. Table 22. S-Register Summary Register 0 1 2 3 4 5 6 7 8 9 A B C D E F 10 11 12 13 14 15 16 17 18 Name NR DW CW CLW TD OFFPD ONPD MF1 MNRP MXRP ROT MNRO MF2 RPE DIT TEC TDT ONHI OFHI MF14 MF15 MLC BTON BTOF BTOD Function Number of rings before answer; 0 suppresses auto answer. Number of seconds modem waits before dialing (maximum of 109 seconds). Number of seconds modem waits for a dial tone before hang-up added to time specified by DW (maximum of 109 seconds). Duration that the modem waits (53.33 ms units) after loss of carrier before hanging up. Both duration and spacing (5/3 ms units) of DTMF dialed tones. Duration of off-hook time (5/3 ms units) for pulse dialing. Duration of on-hook time (5/3 ms units) for pulse dialing. This is a bit mapped register.1 Minimum ring period (5/3 ms units). Ringer off time (53.333 ms units).2 Minimum ringer off time (10 ms units). This is a bit mapped register. 1 2 2 2 2 Reset 0x00 0x03 0x14 0x0E 0x30 0x18 0x24 0000_0001 0x0A 0x28 0x4B 0x28 0000_0000 0x16 0x46 0x2B 0x07 0100_1101 0100_0011 0001_0000 0000_0000 1000_0100 0x32 0x32 0x0F Maximum ring period (5/3 ms units). Ringer off time allowed error (53.333 ms units). TIES escape character. Default = +. TIES delay time (256 * 5/3 ms units). This is a bit mapped register. 1 Pulse dialing Interdigit time (10 ms units added to a minimum time of 64 ms). This is a bit mapped register.1 This is a bit mapped register.1 This is a bit mapped register. This is a bit mapped register. 1 1 Busy tone on. Time that the busy tone must be on (10 ms units) for busy tone detector. Busy tone off. Time that the busy tone must be off (10 ms units) for busy tone detector. Busy tone delta. Detector Time Delta (10 ms). A busy tone is detected to be valid if (BTON - BTOD < on time < BTON + BTOD) and (BTOF - BTOD < off time < BTOF + BTOD). Ringback tone on. Time that the ringback tone must be on (53.333 ms units) for ringback tone detector. Ringback tone off. Time that the ringback tone must be off (53.333 ms units) for ringback tone detector. 19 1A RTON RTOF 0x26 0x4B Rev. 0.95 35 S i2 40 0 Table 22. S-Register Summary (Continued) 1B RTOD Detector time delta (53.333 ms units). A ringback tone is determined to be valid if (RTON - RTOD < on time < RTON + RTOD) and (RTOF - RTOD < off time < RTOF + RTOD). Dial tone time. The time that the dial tone must be valid before being detected (10 ms units). 0x07 1C 1D 1E 1F 20 DTT 0x0A 0x03 0x03 0x2D 0x5D DTMFD DTMF detect time. The time that a DTMF tone must be valid before being detected (10 ms units). TATL ATTD UNL Transmit answer tone length. Answer tone length in seconds when answering a call (3 seconds units). Answer tone to transmit delay. Delay between answer tone end and transmit data start (5/3 ms units). Unscrambled ones length. Minimum length of time required for detection of unscrambled binary ones during V.22 handshaking by a calling modem (5/3 ms units). Transmit scrambled ones delay. Time between unscrambled binary one detection and scrambled binary one transmission by a call mode V.22 modem (5/3 ms units added to a minimum time of 426.66 ms). Transmit scrambled ones length. Length of time scrambled ones are sent by a call mode V.22 modem (5/3 ms units). V.22X data delay low. Delay between handshake complete and data connection for a V.22X call mode modem (5/3 ms units added to the time specified by VDDH). V.22X data delay high. Delay between handshake complete and data connection for a V.22X call mode modem (256 * 5/3 ms units added to the time specified by VDDL). S1 pattern time length. Amount of time the unscrambled S1 pattern is sent by a call mode V.22bis modem (5/3 ms units). V.22bis 1200 bps scrambled ones length. Minimum length of time for transmission of 1200 bps scrambled binary ones by a call mode V.22bis modem after the end of pattern S1 detection (5/3 ms units added to a minimum time of 426.66 ms). V.22bis 2400 bps scrambled ones length low. Minimum length of time for transmission of 2400 bps scrambled binary ones by a call mode V.22bis modem (5/3 ms units added to the time specified by VTSOH). V.22bis 2400 bps scrambled ones length high. Minimum length of time for transmission of 2400 bps scrambled binary ones by a call mode V.22bis modem (256 * 5/3 ms units added to the time specified by VTSOL). Receive scrambled ones V.22bis (2400 bps) length. Minimum length of time required for detection of scrambled binary ones during V.22bis handshaking by the answering modem after S1 pattern conclusion (5/3 ms units). V.23 direct turnaround carrier length. Minimum length of time that a master mode V.23 modem must detect carrier when searching for a direct turnaround sequence (5/3 ms units). 21 TSOD 0x09 22 23 TSOL VDDL 0xA2 0xCB 24 VDDH 0x08 25 26 SPTL VTSO 0x3C 0x0C 27 VTSOL 0x78 28 VTSOH 0x08 2A RSO 0xD2 2B DTL 0x18 36 Rev. 0.95 SI2400 Table 22. S-Register Summary (Continued) 2C DTTO V.23 direct turnaround timeout. Length of time that the modem searches for a direct turnaround carrier (5/3 ms units added to a minimum time of 426.66 ms). V.23 slave carrier detect loss. Minimum length of time that a slave mode V.23 modem must lose carrier before searching for a reverse turnaround sequence (5/3 ms units). V.23 reverse turnaround carrier timeout. Amount of time a slave mode V.23 modem will search for carriers during potential reverse turnaround sequences (5/3 ms units). FSK connection delay low. Amount of time delay added between end of answer tone handshake and actual modem connection for FSK modem connections (5/3 ms units). FSK connection delay high. Amount of time delay added between end of answer tone handshake and actual modem connection for FSK modem connections (256*5/3 ms units). Receive answer tone length. Minimum length of time required for detection of a CCITT answer tone (5/3 ms units). The time after going off hook when the loop current sense bits are checked for overcurrent status (5/3 ms units). This is a bit mapped register.1 Answer tone length when answering a call (5/3 ms units). This register is only used if TATL (1E) has a value of zero. Receive scrambled ones V.22 length (5/3 ms units). Minimum length of time that an originating V.22 (1200 bps) modem must detect 1200 bps scrambled ones during a V.22 handshake. Second kissoff tone detector length. The security modes A1 and !1 will echo a "k" if a kissoff tone longer than the value stored in SKDTL is detected (10 ms units). Carrier detect return. Minimum length of time that a carrier must return and be detected in order to be recognized after a carrier loss is detected (5/3 ms units). Interround time. Time between messages in security pulse modes (53 ms units). Carrier detect timeout. Amount of time modem will wait for carrier detect before aborting call (1 second units). Delay between going off-hook and answer tone generation when in answer mode (53.33 ms units). Minimum number of consecutive ring pulses per ring burst. Loop voltage (on-hook)/loop current (off-hook) register This is a bit mapped register. This is a bit mapped register. 1 1 1 0x08 2D SDL 0x0C 2E RTCT 0x84 2F FCD 0x3C 30 FCDH 0x00 31 32 33 34 35 RATL OCDT MDMO TASL RSOL 0x3C 0x0C 0000_0000 0x5A 0xA2 36 SKDTL 0x64 37 CDR 0x20 38 39 3A 3B DB E0 E1 E2 E3 IRT CDT ATD RP LVCS CF1 CLK1 GPIO GPD 0x38 0x3C 0x29 0x03 0x00 0000_0010 0100_0111 0000_0000 0000_0000 This is a bit mapped register. This is a bit mapped register.1 Rev. 0.95 37 S i2 40 0 Table 22. S-Register Summary (Continued) E4 E5 E5 E5 E5 E6 E6 E6 E7 E8 E9 EA CF5 DADL DDL DSP1 DSP2 DADH DDH DSP3 DSPR3 DSPR4 RTH RTL This is a bit mapped register.1 (SE8 = 0x00) Write only definition. DSP register address lower bits [7:0].1 (SE8 = 0x01) Write only definition. DSP data word lower bits [7:0]. (SE8 = 0x02) Read only definition. This is a bit mapped register. 1 1 0000_0000 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0000_0000 0x00 (SE8 = 0x02) Write only definition. This is a bit mapped register.1 (SE8 = 0x00) Write only definition. DSP register address upper bits [15:8] (SE8 = 0x01) Write only definition. DSP data word upper bits [13:8] (SE8 = 0x02) Write only definition. This is a bit mapped register. This is a bit mapped register.1 Set the mode to define E5 and E6. Timer high. High bits of the realtime timer (see register EA). Timer low. Low bits of the realtime timer. The timer has an LSB of 5/3 ms, with maximum time count at 109 seconds. RTL should always be read first, with RTH read second. This is a bit mapped register.1 This is a bit mapped register.1 This is a bit mapped register. This is a bit mapped register. This is a bit mapped register. This is a bit mapped register. This is a bit mapped register. This is a bit mapped register. 1 1 1 EB F0 F1 F2 F4 F5 F6 F7 F8 F9 TPD DAA0 DAA1 DAA2 DAA4 DAA5 DAA6 DAA7 DAA8 DAA9 0000_0000 0000_0000 0001_1100 0000_0000 0000_1111 0000_1000 0000_0000 0001_0000 xxxx_1100 0000_0000 This is a bit mapped register.1 1 1 1 This is a bit mapped register.1 1 Notes: 1. These registers are explained in detail in the following section. 2. The ring detector will only detect ringing if the ring burst on/off times meet the settings in MNRP, MXRP, MNRU, ROT, and REP. 38 Rev. 0.95 SI2400 Register 7. Modem Functions 1 Bit D7 D6 BD R/W D5 V23 R/W D4 D3 D2 D1 D0 FSK R/W Name HDEN Type R/W MODM DTMF R/W R/W BAUD CCITT R/W R/W Reset settings = 0000_0001 Bit 7 Name HDEN HDLC Framing. 0 = Disable 1 = Enable Function 6 BD Blind Dialing. 0 = Disable 1 = Enable (Blind dialing occurs immediately after "ATDT#" command.) 5 V23R V.23 Receive. V.23 75 bps send/600 (BAUD = 0) or 1200 (BAUD = 1) bps receive 0 = Disable 1 = Enable 4 V23T V.23 Transmit. V.23 600 (BAUD = 0) or 1200 (BAUD = 1) bps send/75 bps receive 0 = Disable 1 = Enable 3 DTMF DTMF Tone Detector. 0 = Disable 1 = Enable 2 BAUD 2400/1200 Baud Select. 2400/1200 baud select (V23R = 0 and V23T = 0) 0 = 1200 1 = 2400 600/1200 baud select (V23R = 1 and V23T = 1) 0 = 600 1 = 1200 1 CCITT CCITT/Bell Mode. 0 = Bell 1 = CCITT 0 FSK 300 bps FSK. 0 = Disable 1 = Enable Rev. 0.95 39 S i2 40 0 Register C. Modem Functions 2 Bit Name Type D7 D6 D5 CIDM R/W D4 D3 9BF R/W D2 BDL R/W D1 MLB R/W D0 MCH R/W Reset settings = 0000_0000 Bit 7:6 5 Name Reserved CIDM Read returns zero. Caller ID Monitor. Function Causes the SI2400 to search for the caller ID Channel Seizure Signal (alternating 1/0 pattern) continuously. 0 = Disable (default) 1 = Enable 4 3 Reserved 9BF Read returns zero. Ninth Bit Function. Only valid if the ninth bit escape is set (S15.0). 0 = Ninth bit equivalent to ALERT. 1 = Ninth bit equivalent to HDLC EOFR. 2 1 0 BDL MLB MCH Blind Dialing. Enables blind dialing after register CW dial timeout (S02) expires. Modem Loopback. Swaps frequency bands in modem algorithm to do a loopback in a test mode. Miscellaneous Characters. Enables "." and "/" character echoing to indicate tone on and tone off for security mode and the SIA pulse modes. Register 11. On-Hook Intrusion Bit Name Type D7 D6 DVL R/W D5 D4 D3 D2 AVL R/W D1 D0 Reset settings = 0100_1101 Bit 7:5 4:0 Name DVL AVL Differential Voltage Level. Function Differential voltage level to detect intrusion event. Absolute Voltage Level. Absolute voltage level to detect intrusion event. 40 Rev. 0.95 SI2400 Register 12. Off-Hook Intrusion Bit Name Type D7 D6 DCL R/W D5 D4 D3 D2 ACL R/W D1 D0 Reset settings = 0100_0011 Bit 7:5 4:0 Name DCL ACL Differential Current Level. Function Differential current level to detect intrusion event. Absolute Current Level. Absolute current level to detect intrusion event. Rev. 0.95 41 S i2 40 0 Register 13. Modem Functions 3 Bit Name Type D7 JID R/W D6 BTID R/W D5 OFHE R/W D4 OFHD R/W D3 D2 D1 D0 PCM R/W ONHD CIDB CIDU R/W R/W R/W Reset settings = 0001_0000 Bit 7 Name JID Japan Caller ID. 0 = Disable 1 = Enable Function 6 BTID BT Caller ID Wetting Pulse D. 0 = Enable 1 = Disable 5 OFHE Enable Off Hook. Enable off hook in current limit mode for overcurrent protection. 0 = Disable 1 = Enable 4 OFHD Off Hook Intrusion Detect Method. 0 = Absolute 1 = Differential 3 ONHD On Hook Intrusion Detect Method. 0 = Absolute 1 = Differential 2 CIDB British Telecom Caller ID Decode. 0 = Disable 1 = Enable 1 CIDU BellCore Caller ID Decode. 0 = Disable 1 = Enable 0 PCM PCM Data Mode. Baud rate must be 228613, and flow control must be used. 0 = Disable 1 = Enable 42 Rev. 0.95 SI2400 Register 14. Modem Functions 4 Bit D7 D6 UDF R/W D5 TEO R/W D4 AOC R/W D3 OD R/W D2 NLD R/W D1 IND R/W D0 RD R/W Name MRCD Type R/W Reset settings = 0000_0000 Bit 7 6 5 4 3 2 1 0 Name MRCD UDF TEO AOC OD NLD IND RD Disable Modem Result Codes. User Defined Frequency. Function Enables user defined frequency detectors in A0 and !0 modes. TIES Escape Operation. Enables TIES escape operation. AutoOverCurrent Protection. Enables AutoOverCurrent protection. Overcurrent Detected. Sticky. No Phone Line Detected. Intrusion Detected. Ring Detected. Rev. 0.95 43 S i2 40 0 Register 15. Modem Link Control Bit D7 D6 D5 D4 EGHE R/W D3 STB R/W D2 D1 D0 NBE R/W Name ATPRE VCTE FHGE Type R/W R/W R/W BDA R/W Reset settings = 1000_0100 Bit 7 6 5 4 3 Name ATPRE VCTE FHGE EHGE STB V.25 Calling Tone Enable. 550 Hz Guardtone Enable. 1800 Hz Guardtone Enable. Stop Bits. 0 = 1 stop bit 1 = 2 stop bits Function Answer Tone Phase Reversal Enable. 2:1 BDA Bit Data. 00 = 6 bit data 01 = 7 bit data 10 = 8 bit data 11 = 9 bit data 0 NBE Ninth Bit Enable. Enable ninth bit as Escape and ninth bit function (register C). 44 Rev. 0.95 SI2400 Register 33. Modem Override Bit Name Type D7 D6 DON R/W D5 DOF R/W D4 D3 D2 D1 NAT R/W D0 TSAC R/W Reset settings = 1000_0000 Bit 7 6 Name Reserved DON Read returns one. On-Hook Intrusion Detect. 0 = Enable (default) 1 = Disable Function 5 DOF Off-Hook Intrusion Detect. 0 = Enable (default) 1 = Disable 4:2 1 0 Reserved NAT TSAC Read returns zero. No Answer Tone. Enable no answer tone fast handshake. Transmit Scrambler Active. Force transmit scrambler active once connected. Rev. 0.95 45 S i2 40 0 Register E0. Chip Functions 1 Bit Name Type D7 D6 D5 ICTS D4 D3 ND D2 D1 SD D0 Reset settings = 0010_0010 Bit 7:6 5 Name Reserved ICTS Read returns zero. Invert CTS pin. 0 = Inverted (CTS) 1 = Normal (CTS) Function 4 3 2:0 Reserved ND SD Read returns zero. 0 = 8N1 1 = 9N1 (hardware UART only) Serial Dividers. 0 = 300 bps serial link 1 = 1200 bps serial link 2 = 2400 bps serial link 3 = 9600 bps serial link 4 = 19200 bps serial link 5 = 228613 bps serial link (0.8% error to 230400 bps) 6 = 245760 bps serial link 7 = 307200 bps serial link 46 Rev. 0.95 SI2400 Register E1. Chip Functions 2 Bit Name Type D7 D6 D5 D4 D3 D2 CLKD D1 D0 MCKR Reset settings = 0100_0111 Bit 7:6 Name MCKR Microcontroller Clock Rate. 0 = Fastest 9.8304 MHz (default) 1 = 4.9152 MHz 2 = 2.4576 MHz 3 = Reserved Function Note: MCKR must be set to 0 when the UART baud rate is set to 228613 or greater (SD = 5, 6, or 7). 5 4:0 Reserved CLKD Read returns zero. CLK_OUT Divider. 0 = Disable CLK_OUT pin CLK_OUT = 78.6432/(CLKD + 1) MHz Rev. 0.95 47 S i2 40 0 Register E2. Chip Functions 3 Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 GPIO4 R/W GPIO3 R/W GPIO2 R/W GPIO1 R/W Reset settings = 0000_0000 Bit 7:6 Name GPIO4 GPIO4. 0 = Digital input 1 = Digital output (relay drive) 2 = Analog input 3 = ALERT function (digital output) Function 5:4 GPIO3 GPIO3. 0 = Digital input 1 = Digital output (relay drive) 2 = Analog input 3 = ESCAPE function (digital input) 3:2 GPIO2* GPIO2. 0 = Digital input 1 = Digital output (relay drive) 2 = Analog input 3 = Reserved 1:0 GPIO1* GPIO1. 0 = Digital input 1 = Digital output (relay drive) 2 = Analog input 3 = Reserved *Note: To be used as analog input or GPIO pins; GPE (SE4.3) and TRSP (SE4.0) must both equal zero. 48 Rev. 0.95 SI2400 Register E3. Chip Functions 4 Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 AING R/W GPD4 GPD3 GPD2 GPD1 R/W R/W R/W R/W Reset settings = 0000_0000 Bit 7:6 Name AING AIN Gain Bits. 00 = 0 dB 01 = 6 dB 10 = 2.5 dB 11 = 12 dB Function 5:4 3 2 1 0 Reserved GPD4 GPD3 GPD2 GPD1 Read returns zero. GPIO4 Data. GPIO3 Data. GPIO2 Data. GPIO1 Data. Rev. 0.95 49 S i2 40 0 Register E4. Chip Functions 5 Bit D7 D6 D5 DRT R/W D4 D3 GPE R/W D2 D1 APO R/W D0 TRSP R/W Name NBCK SBCK Type R R Reset settings = 0000_0000 Bit 7 6 5:4 Name NBCK SBCK DRT Function 9600 Baud Clock (Read Only). 600 Baud Clock (Read Only). Data Routing 0 = Data mode, DSP output transmitted to line, line received to DSP input 1 = Voice mode, selected AIN transmitted to line, line received to AOUT 2 = Loopback mode, RXD through microcontroller (DSP) to TXD. AIN looped to AOUT. 3 = Codec mode, data from DSPOUT to AOUT, selected AIN to DSPIN 3 2 1 0 GPE* Reserved APO TRSP* GPIO1 Enable. Enable GPIO1 to be HDLC end-of-frame flag. Read returns zero. Analog Power On. Power on analog ADC and DAC. TXD2/RXD2 Serial Port. Enable TXD2/RXD2 serial port so that TXD2 is GPIO1 and RXD2 is GPIO2. *Note: GPE and TRSP are mutually exclusive. Only one can be set at any one time, and they override the settings in registers GPIO2 and GPIO1. Once TXD2 and RXD2 are enabled through TRSP = 1, the primary serial port TXD and RXD no longer function and pins TXD2 and RXD2 control the SI2400. This feature allows a second microcontroller to control the SI2400. 50 Rev. 0.95 SI2400 Register E5. (SE8 = 0x02) Read Only Definition Bit D7 D6 D5 D4 D3 D2 TONE R D1 D0 Name DDAV TDET Type R R Reset settings = 0000_0000 Bit 7 6 Name DDAV TDET DSP Data Available. Function Tone Detected. Indicates a TONE (any of type 0-25 below) has been detected. 0 = Not detected 1 = Detected 5 4:0 Reserved TONE Read returns zero. Tone Type Detected. When TDET goes high, TONE indicates which tone has been detected from the following: TONE Tone Type Priority 0-15 DTMF 0-15 (DTMFE = 1) See Table 19 on page 31 1 16 Answer tone detected 2100 Hz (ANSE = 1) 2 17 Bell 103 answer tone detected 2225 Hz (ANSE = 1) 2 18 V.23 forward channel mark 1300 Hz (V23E = 1) 3 19 V.23 backward channel mark 390 Hz (V23E = 1) 3 20 User defined frequency 1 (USEN1 = 1) 4 21 User defined frequency 2 (USEN1 = 1) 4 22 Call progress filter A detected 6 23 User defined frequency 3 (USEN2 = 1) 5 24 User defined frequency 4 (USEN2 = 1) 5 25 Call progress filter B detected 6 Rev. 0.95 51 S i2 40 0 Register E5. (SE8 = 0x02) Write Only Definition Bit Name Type D7 D6 D5 DTM W D4 D3 D2 D1 TONC W D0 Reset settings = 0000_0000 Bit 7 6:3 2:0 Name Reserved DTM TONC Function Read returns zero. DTMF tone (0-15) to transmit when selected by TONC (TONC = 1). See Table 19 on page 31 Tone Tone Type 0 1 2 3 4 5 6 7 Mute DTMF 2225 Hz Bell mode answer tone with phase reversal 2100 Hz CCITT mode answer tone with phase reversal 2225 Hz Bell mode answer tone without phase reversal 2100 Hz CCITT mode answer tone without phase reversal User-defined programmable frequency tone (UFRQ) (see Table 20 on page 32, default = 1700 Hz) 1300 Hz V.25 calling tone Register E6. (SE8 = 0x02) Write Only Definition Bit Name Type D7 CPSQ W D6 CPCA W D5 D4 USEN2 W D3 USEN1 W D2 V23E W D1 ANSE W D0 DTMFE W Reset settings = 0000_0000 Bit 7 6 Name CPSQ CPCD Function 1 = Enables a squaring function on the output of filter B before the input is input to A (cascade mode only). 0 = Call progress filter B output is input into call progress filter A. Output from filter A is used in the detector. 1 = Cascade disabled. Two independent fourth order filters available (A and B). The largest output of the two is used in the detector. Enables the reporting of user defined frequency tones 3 and 4 through TONE. Enables the reporting of user defined frequency tones 1 and 2. Enables the reporting of V.23 tones, 390 Hz and 1300 Hz. Enables the reporting of answer tones. Enables the reporting of DTMF tones. 5 4 3 2 1 0 Reserved USEN2 USEN1 V23E ANSE DTMFE 52 Rev. 0.95 SI2400 Register E7. DSPR3 Write Only Bit Name Type D7 D6 D5 D4 D3 D2 MLO W D1 REIN W D0 REEN W Reset settings = 0000_0000 Bit 7:3 2 1 0 Name Reserved MLO REIN REEN Read returns zero. Modem Loopback. Receiver Equalizer Inhibit. Receiver Equalizer Enable. Function Register EB. Timer and Power Down Bit Name Type D7 D6 D5 CWTI R/W D4 DWRC R/W D3 PDDE R/W D2 D1 D0 Reset settings = 0000_0000 Bit 7:6 5 4 3 Name Reserved CWTI DWRC PDDE Read returns zero. Clear Watchdog Timer. Disable Watchdog Reset Circuit. Power Down DSP Engine. 0 = Power on 1 = Power down Function 2:0 Reserved Read returns zero. Rev. 0.95 53 S i2 40 0 Register F0. DAA Low Level Functions 0 Bit Name Type D7 D6 D5 D4 D3 D2 D1 LM D0 OFHK Reset settings = 0000_0000 Bit 7:2 1 0 Name Reserved LM OFHK Read returns zero. Hook Control/Status.1,2,3 OFHK 0 0 0 0 1 1 1 1 LM 0 0 1 1 0 0 1 1 LM0 0 1 0 1 0 1 0 1 Function Line Status Mode On hook On hook with LVCS as voltage monitor On hook line monitor mode (Si3014 compatible) On hook line monitor mode (Si3015 compatible) Off hook with LVCS as loop current monitor Reserved Reserved Reserved Notes: 1. See Register F7 on page 60 for LM0. 2. Under normal operation, the SI2400 internal microcontroller will automatically set these bits appropriately. 3. Force on hook supports caller ID type 2. 54 Rev. 0.95 SI2400 Register F1. DAA Low Level Functions 1 Bit Name Type D7 BTE R/W D6 PDN R/W D5 PDL R/W D4 CPE R/W D3 RXE R/W D2 HBE R/W D1 AL R/W D0 DL R/W Reset settings = 0001_1100 Bit 7 Name BTE Billing Tone Enable. Function When the Si3015 detects a billing tone, BTD is set. 0 = Disable 1 = Enable 6 PDN Power Down. 0 = Normal operation. 1 = Powers down the SI2400. 5 PDL Power Down Line-Side Chip. 0 = Normal operation. Program the clock generator before clearing this bit. 1 = Places the Si3015 in lower power mode. 4 CPE Charge Pump Enable. 0 = Charge pump off. 1 = Charge pump on. 3 RXE Receive Path Enable. 0 = Disable 1 = Enable 2 1 HBE AL Hybrid Transmit Path Connect. 1 = Connects transmit path in hybrid Analog Loopback. 1 = Enables external analog loopback mode. 0 = Analog loopback mode disabled. 0 DL Isolation Digital Loopback. 1 = Enables digital loopback mode across isolation barrier. The line side must be enabled prior to setting this mode. 0 = Digital loopback across isolation barrier disabled. Rev. 0.95 55 S i2 40 0 Register F2. DAA Low Level Functions 2 Bit Name Type D7 D6 LCS R D5 D4 D3 FDT R D2 RDT R/W D1 RDTN R D0 RDTP R Reset settings = 0000_0000 Bit 7:4 Name LCS Loop Current Sense. Function Four-bit value returning the loop current in 6-mA increments. 0 = Loop current < 0.4 mA. 1111 = Loop current > 155 mA. See "Loop Current Monitor" section. 3 FDT Frame Detect. 1 = Indicates ISOcap frame lock has been established. 0 = Indicates ISOcap frame lock has not been established. 2 RDT Ring Detect. 1 = Indicates a ring is occurring. 0 = Reset either 4.5-9 seconds after last positive ring is detected or when the system executes an off-hook. 1 0 RDTN RDTP Ring Detect Signal Negative. When set, a negative ring signal is occurring. Ring Detect Signal Positive. When set, a positive ring signal is occurring. 56 Rev. 0.95 SI2400 Register F4. DAA Low Level Functions 4 Bit Name Type D7 SQLH R/W D6 D5 ARG R/W D4 D3 ARL R/W D2 D1 ATL R/W D0 Reset settings = 0000_1111 Bit 7 Name SQLH Ring Squelch. Function If the host implements a manual ring detect (bypassing the SI2400 micro), this bit must be set, then cleared following a polarity reversal detection. Used to quickly recover offset on RNG1/2 pins after polarity reversal. 0 = Normal 1 = Squelch 6:4 ARG Analog Receive Gain. Off-Hook 000 = 0 dB gain 001 = 3 dB gain 010 = 6 dB gain 011 = 9 dB gain 1xx = 12 dB gain On-Hook 000 = 7 dB 001 = 6 dB 010 = 4.8 dB 011 = 3.5 dB 1xx = 2.0 dB 3:2 ARL AOUT Receive--Path Level DAA receive path signal AOUT gain. 0 = 0 dB 1 = -6 dB 2 = -12 dB* 3 = Mute 1:0 ATL AOUT Transmit--Path Level DAA transmit path signal AOUT gain. 0 = -18 dB 1 = -24 dB 2 = -30 dB* 3 = Mute *Note: If ARL = 2 and ATL = 2, AOUT is muted. Rev. 0.95 57 S i2 40 0 Register F5. DAA Low Level Functions 5 Bit Name Type D7 FULLS D6 DCTO D5 OHS D4 ACT D3 DCT D2 D1 RZ D0 RT Reset settings = 0000_1000 Bit 7 Name FULLS Full Scale. 0 = Default 1 = Modem codec fullscale > 3.2 dBm Function 6 DCTO DC Termination Off. Presents an 800 impedance to the line. 0 = Enable DC termination 1 = Disable 5 OHS On-Hook Speed. 0 = The SI2400 will execute a fast on-hook. 1 = The SI2400 will execute a slow, controlled on-hook. 4 ACT AC Termination. 0 = Real impedance 1 = Complex impedance 3:2 DCT DC Termination Voltage. 00 = Norway mode (maximum transmit level = -5 dBm) 01 = Japan mode (maximum transmit level = -3 dBm) 10 = USA mode (maximum transmit level = -1 dBm) (default) 11 = TBR21/France current limit mode (maximum transmit level = -1 dBm) 1 RZ Ringer Impedance Decrease. Decreases ringer impedance. 0 = Disable (Rest of World) 1 = Enable (Korea, Poland, South Africa) 0 RT Ringer Threshold. 0 = 11-21 Vrms threshold 1 = 21-31 Vrms threshold 58 Rev. 0.95 SI2400 Register F6. DAA Low Level Functions 6 Bit Name Type D7 D6 MCAL R/W D5 ACAL R/W D4 D3 FJM R/W D2 VDD3_TWK R/W D1 VOL R/W D0 FNM R/W Reset settings = 0000_0000 Bit 7 6 Name Reserved MCAL Read returns zero. Manual Calibration Request. 0 = Normal 1 = Immediately calibrate Function Note: Must disable autocalibration (ACAL) before using manual calibration. 5 ACAL Automatic Calibration Disable. 0 = Enable (default) 1 = Disable 4 3 Reserved FJM Read returns zero. Force Japan DC Termination. 0 = Normal mode 1 = Force Japan DC termination 2 VDD3_TWK VDD3 Voltage Tweak. 0 = Nominal 1 = Forces VDD3 = 2.1 V when in USA or CTR21 DCT. This bit does not modify the DCT bias voltage. 1 VOL Line Voltage Tweak. 0 = Nominal 1 = Decreases DC termination voltage 0 FNM Force Norway Mode. 0 = Default 1 = Norway DCT mode, same as DCT = 00 but without TX attenuation. Rev. 0.95 59 S i2 40 0 Register F7. DAA Low Level Functions 7 Bit Name Type D7 D6 D5 D4 LM0 R/W D3 LIM R/W D2 OVL_PROT R/W D1 D0 Reset settings = 0001_0000 Bit 7:5 4 3 Name Reserved LM0 LIM Read returns zero. See LM0 in Register F0 page 54. Current-Limiting Tweak Value. 0 = Disable 1 = Enable (CTR21 mode) Function 2 OVL_PROT Overload Protect. 0 = Disable 1 = Enable 1:0 Reserved Read returns zero. Register F8. DAA Low Level Functions 8 Bit Name Type D7 D6 LRV R D5 D4 D3 D2 D1 D0 Bit 7:4 Name LRV Line-Side Chip Revision Number. 0001 = Si3014 Rev A 0010 = Si3014 Rev B 0011 = Si3014 Rev C 1001 = Si3015 Rev A 1010 = Si3015 Rev B 1011 = Si3015 Rev C Function 3:0 Reserved Read returns indeterministic. 60 Rev. 0.95 SI2400 Register F9. DAA Low Level Functions 9 Read Only Bit Name Type D7 D6 OVL R D5 D4 VDD3_DROP R D3 BTD R D2 D1 ROV R D0 Reset settings = 0000_0000 Bit 7 6 5 4 Name Reserved OVL Reserved VDD3_DROP Read returns zero. Receive Overload. Same as ROV, except non-sticky. Read returns zero. VDD3 Drop. 0 = Normal 1 = VDD3 drop detected Function 3 BTD Billing Tone Detect (sticky). 0 = No billing tone detected 1 = Billing tone detected 2 1 Reserved ROV Read returns zero. Receive Overload. 0 = No excessive level detected 1 = Excessive input level detected (sticky) 0 Reserved Read returns zero. Rev. 0.95 61 S i2 40 0 AP P E N D I X A--D AA O P E R A T I O N Introduction This section describes the detailed functionality of the integrated DAA included in the SI2400 chipset. This specific functionality is generally transparent to the user when using the on-chip controller in the SI2400 modem. When bypassing the on-chip controller, the low-level DAA functions of the Si3015 described in this section can be controlled through S registers. DC Termination The SI2400 has three programmable DC termination modes, selected with the DCT (SF5.3:2). Japan Mode (DCT = 1), shown in Figure 13, is a lower voltage mode and supports a transmit full-scale level of -2.71 dBm. Higher transmit levels for DTMF dialing are also supported. The low voltage requirement is dictated by countries such as Japan and Singapore. USA Mode (DCT = 2), shown in Figure 14, is the default DC termination mode and supports a transmit full scale level of -1 dBm at TIP and RING. This mode meets FCC requirements in addition to the requirements of many other countries. CTR21 Mode (DCT = 3), shown in Figure 15, provides current limiting, while maintaining a transmit full scale level of -1 dBm at TIP and RING. In this mode, the DC termination will current limit before reaching 60 mA. 10.5 10 9.5 9 8.5 8 7.5 7 6.5 6 5.5 .01 .02 .03 .04 .05 .06 .07 .08 .09 .1 .11 Loop Current (A) Japan DCT Mode DAA Isolation Barrier The SI2400 chipset consists of the Si3015 line-side device and the SI2400 modem device. The SI2400 achieves an isolation barrier through a low-cost, highvoltage capacitor in conjunction with Silicon Laboratories' proprietary ISOcap signal processing techniques. These techniques eliminate any signal degradation due to capacitor mismatches, common mode interference, or noise coupling. As shown in Figure 3 on page 9, the C1, C2, C24, and C25 capacitors isolate the SI2400 (DSP side) from the Si3015 (line side). All transmit, receive, and control data are communicated through this barrier. The SI2400 chipset and recommended DAA schematic is fully compliant with and passes all international electromagnetic emissions and conducted immunity tests (includes FCC part 15,68; EN55022; EN50082-1). Careful attention to the SI2400 bill of materials (Table 9), schematic (Figure 3), and layout guidelines (included in the SI2400URT-EVB data sheet) will ensure compliance with these international standards. In designs with difficult layout constraints, the addition of the C31 and C32 capacitors to the C24 and C25 recommended capacitors may improve modem performance on emissions and conducted immunity. For such designs, a population option for C31 and C32 may allow additional flexibility for optimization after the printed circuit board has been completed. Also, under some layout conditions, C31 and C32 may improve the immunity to telephone line transients. This is most important for applications that use the voice codec feature of the SI2400. Because line transients are infrequent and high voltage in nature, they tend to be more problematic in voice applications than in data applications. An occasional pop in a voice application is quite noticeable, whereas occasional bit errors are easily corrected in a modem connection with an errorcorrection protocol. 62 Rev. 0.95 Voltage Across DAA ( V ) Emissions/Immunity Figure 13. Japan Mode I/V Characteristics SI2400 12 Voltage Across DAA ( V ) 11 10 9 8 7 6 .01 .02 .03 .04 .05 .06 .07 .08 .09 .1 .11 Loop Current (A) USA DCT Mode Manual Ring Detection The procedure for manual ring detection is as follows: The ring signal is capacitively coupled from TIP and RING to the RNG1 and RNG2 pins. The SI2400 supports either full- or half-wave ring detection. The ring detection threshold is programmable with RT (SF5.0). With full-wave ring detection, the designer can detect a polarity reversal as well as a ring signal. A manual ring requires using the register bits RDTP, RDTN, and RDT in register F2. The host must detect the frequency of the ring signal in order to distinguish a ring from pulse dialing by telephone equipment connected in parallel. The ring detector mode is controlled by RFWE (SF6.4). When the RFWE is 0 (default mode), the ring detector operates in half-wave rectifier mode. In this mode, only positive ringing signals are detected. A positive ringing signal is defined as a positive voltage greater than the ring threshold across RNG1-RNG2. RNG1 and RNG2 are pins 5 and 6 of the Si3015. Conversely, a negative ringing signal is defined as a negative voltage less than the negative ring threshold across RNG1-RNG2. When the RFWE is 1, the ring detector operates in fullwave rectifier mode. In this mode, both positive and negative ring signals are detected. The RDTP and RDTN behavior is based on the RNG1RNG2 voltage. Whenever the signal RNG1-RNG2 is above the positive ring threshold, the RDTP bit is set. Whenever the signal RNG1-RNG2 is below the negative ring threshold, the RDTN bit is set. When the signal RNG1-RNG2 is between these thresholds, neither bit is set. The RD behavior is also based on the RNG1-RNG2 voltage. When RFWE is a 0 or a 1, a positive ringing signal will set the RD bit for a period of time. The RD bit will not be set for a negative ringing signal. The RD bit acts as a one-shot. Whenever a new ring signal is detected, the one-shot is reset. If no new ring signals are detected prior to the one-shot counter counting down to zero, then the RD bit will return to zero. The length of this count (in seconds) is 65536 divided by the sample rate (9600 Hz). The RD will also be reset to zero by an off-hook event. Figure 14. USA Mode Characteristics CTR21 DCT Mode 45 Voltage Across DAA ( V ) 40 35 30 25 20 15 10 5 .015 .02 .025 .03 .035 .04 .045 .05 .055 .06 Loop Current (A) Figure 15. CTR21 Mode Characteristics AC Termination The SI2400 has two AC termination impedances, selected with the ACT bit (SF5.4). ACT=0 is a real, nominal 600 termination which satisfies the impedance requirements of FCC part 68, JATE, and other countries. This real impedance is set by circuitry internal to the SI2400 chipset as well as the resistor R2 connected to the Si3015 REXT pin. ACT=1 is a complex impedance which satisfies the impedance requirements of Australia, New Zealand, South Africa, CTR21 and some European NET4 countries such as the UK and Germany. This complex impedance is set by circuitry internal to the SI2400 chipset as well as the network connected to the Si3015 REXT2 pin. Ringer Impedance The ring detector in a typical DAA is AC coupled to the line with a large, 1 uF, 250 V decoupling capacitor. The ring detector on the SI2400 is also capacitively coupled to the line, but it is designed to use smaller, less expensive 1.8 nF capacitors. Inherently, this network produces a very high ringer impedance to the line on Rev. 0.95 63 S i2 40 0 the order of 800 to 900 k. This value is acceptable for most countries, including FCC and CTR21. Several countries, including the Czech Republic, Poland, South Africa and South Korea, require a maximum ringer impedance. For Poland, South Africa and South Korea, the maximum ringer impedance specification can be met with an internally synthesized impedance by setting the RZ bit (SF5.1). For official Czech Republic designs, an additional network comprising C15, R14, Z2, and Z3 is required. See Figure 16. This network is not required for any other countries. However, if this network is installed, the RZ bit should not be set for any countries. Increased distortion may be observed, which is acceptable during DTMF dialing. After DTMF dialing is complete, the attenuation should be enabled by setting the Japan DC termination mode DCT. The FJM bit has no effect in Japan DC termination mode. Pulse Dialing Pulse dialing is accomplished by going off and on hook to generate make and break pulses. The nominal rate is 10 pulses per second. Some countries have very tight specifications for pulse fidelity, including make and break times, make resistance, and rise and fall times. In a traditional solid-state DC holding circuit, there are a number of issues in meeting these requirements. The SI2400 DC holding circuit has active control of the on-hook and off-hook transients to maintain pulse dialing fidelity. Spark quenching requirements in countries such as Italy, Netherlands, South Africa and Australia deal with the on-hook transition during pulse dialing. These tests provide an inductive DC feed, resulting in a large voltage spike. This spike is caused by the line inductance and the sudden decrease in current through the loop when going on-hook. The traditional way of dealing with this problem is to put a parallel RC shunt across the hookswitch relay. The capacitor is large (~1 uF, 250 V) and expensive. In the SI2400, OHS (SF5.6:5) can be used to slowly ramp down the loop current to pass these tests without requiring additional components. TIP C15 R14 Z2 Z3 RING Figure 16. Ring Z From Line To DAA Table 23. Ringer Impedance Component Values Billing Tone Detection Component Reference C15 R14 Z2,Z3 Value 1 F, 250 V, X7R, 20% 7.5 k, 1/4 W, 5% Zener Diode, 5.6 V Suppliers Venkel, Johanson, Panasonic Vishay, Motorola, Rohm "Billing tones" or "Metering Pulses" generated by the central office can cause modem connection difficulties. The billing tone is typically either a 12 KHz or 16 KHz signal and is sometimes used in Germany, Switzerland, and South Africa. Depending on line conditions, the billing tone can be large enough to cause major errors related to the modem data. The SI2400 chipset has a feature which allows the device to remain off-hook during billing tones and provide feedback to the host as to whether a billing tone has occurred and when it ends. See Figure 17. Billing tone detection is enabled by setting the BTE bit (SF1.7). When a billing tone of sufficient amplitude occurs, the DC termination is released and the line is presented with an 800 DC impedance. This is sufficient to maintain an off-hook condition. Simultaneously, the following bits will be set: ! ! ! DTMF Dialing In Japan DC termination mode (DCT[1:0]=01b), the SI2400 device attenuates the transmit output by 1.7 dB to meet headroom requirements. This attenuation must be removed to meet the -6 dB/-8 dB DTMF dialing levels specified in Singapore, which requires the Japan DC termination mode. When in the US, DC termination mode, the FJM bit (SF6.3) will enable the Japan DC termination mode without the 1.7 dB attenuation. BTD--Billing Tone Detect (SF9.3) ROV--Receive Overload (SF9.6) OVL--Overload Detected (SF9.1) 64 Rev. 0.95 SI2400 In applications that might be susceptible to billing tones, the OVL bit should be monitored (polled). When it returns to zero indicating that the billing tone has passed, the BTD bit should be written to zero to return the DC termination to its original state. BTD and ROV are sticky bits which must be written to zero to reset them. It will take approximately one second to return to normal operating conditions. Although the DAA will remain off-hook during a billing tone event, the received data from the line will be corrupted when a billing tone occurs. If the user wishes to receive data through a billing tone, an external LC filter must be added. A modem manufacturer can provide this filter to users in the form of a dongle that connects on the phone line before the DAA. This keeps the manufacturer from having to include a costly LC filter internal to the modem when it may only be necessary to support only a few countries. Alternatively, when a billing tone is detected, the host software may notify the user that a billing tone has occurred. This notification can be used to prompt the user to contact the telephone company to have the billing tones disabled. In FCC and Japan DC termination modes, an offhook LCVS value of 63 means the loop current is greater than 120 mA indicating the DAA is drawing excessive loop current. In CTR21 mode, 120 mA of loop current is not possible due to the current limit circuit. The LCVS bits can be used to detect excessive line voltage in this mode. They will report a value of 63 in an overvoltage condition. Gain Control The SI2400 supports multiple receive gain settings. The receive path can support gains of 0, 3, 6, 9, and 12 dB, as selected by ARG (SF4.6:4). In-Circuit Testing The SI2400's advanced design provides the system manufacturer with increased ability to determine system functionality during production line tests, as well as support for end-user diagnostics. In addition to the local echo, three loopback modes exist allowing increased coverage of system components. For two of the test modes, a line-side power source is needed. While a standard phone line can be used, the test circuit in Figure 1 on page 5 is adequate. In addition, an off-hook sequence must be performed to connect the power source to the line-side chip. To test communication with the SI2400 across the UART, the local echo may by used immediately after powerup. All other test modes except the analog loopback mode require setting the UART to a high baud rate and enabling PCM mode (set PCM (S13.0)=1), as described in "PCM Data Mode" on page 19. The DSP loopback test mode tests the functionality and data transfer from the host across the UART RXD pin, to the SI2400 microcontroller, to the SI2400 DSP filters, back through the microcontroller, and back across the UART TXD pin to the host. To enable this mode, set the UART to PCM mode and set DRT (SE4.5:4) = 2. This path will introduce approximately 0.9 dB of attenuation from the RXD received to the TXD. In addition, as shown in Figure 10C, the ADC from AIN connects directly through the DAC to AOUT for testing of the voice codec. The remaining test modes requires the SI2400 to be offhook in order to operate. To force the SI2400 off-hook, set OFHK (SF0.0) = 1. Before running the test mode, the user must wait 4806/Fs (500 ms) to allow the SI2400 calibration to occur. The ISOcap digital loopback mode allows the host to provide a digital test pattern on RXD and receive that test pattern on TXD. To enable this mode, set DL (SF1.0) = 1. In this mode, the isolation barrier is actually Figure 17. Billing Tone Filter Overload Detection The SI2400 can detect if an overload condition is present which may damage the DAA circuit. The DAA may be damaged if excessive line voltage or loop current is sustained. Rev. 0.95 65 S i2 40 0 being tested. The digital stream is delivered across the isolation capacitor, C1 of Figure 3 on page 9, to the line side device and returned across the same barrier. Note that in this mode, the 0.9 dB attenuation also exists. The final testing mode, internal analog loopback, allows the system to test the basic operation of the transmit and receive paths on the line-side chip and the external components in Figure 3 on page 9. In this test mode, the host provides a digital test waveform on RXD. This data is passed across the isolation barrier, transmitted to and received from the line, passed back across the isolation barrier, and presented to the host on TXD. To enable this mode, clear HBE (SF1.2). When the HBE bit is cleared, this will cause a DC offset which affects the signal swing of the transmit signal. In this test mode, it is recommended that the transmit signal be 12 dB lower than normal transmit levels. This lower level will eliminate clipping caused by the DC offset which results from disabling the hybrid. It is assumed in this test that the line AC impedance is nominally 600 . Note: All test modes are mutually exclusive. If more than one test mode is enabled concurrently, the results are unpredictable. 66 Rev. 0.95 SI2400 AP P E N D I X B--TY P I C A L M O D E M APPLI C A T I O N S EX A M P L E S Introduction Appendix B outlines the steps required to configure the SI2400 for modem operation under typical examples. The ISOmodem has been designed to be both easy to use and flexible. The SI2400 has many features and modes, which add to the complexity of the device, but are not required for a typical modem configuration. The goal of this appendix is to help the user to quickly make a modem connection and begin evaluation of the SI2400 under various operational examples. c - connect 6. Next byte after "c" is modem data! Example 4: Bell 103 in Australia with Parallel Phone Detect 1. Power on reset 2. Set Host UART to 2400 bps 3. ATS07=01 (set for FSK 300 bps) 4. ATSF5=78 (set DAA for Australia) 5. ATSE2=C0 (enable ALERT pin) 6. ATDT18005551212 Example 1: V.22bis in FCC countries 1. Power on reset 2. Set Host UART to 2400 bps 3. ATS07=06 set for QAM 2400 bps 4. ATDT18005551212 Example 5: Bell 212A in South Korea with Japanese caller ID 1. Power on reset 2. Set Host UART to 2400 bps 3. ATS07=00 (set for DPSK 1200 bps) 4. ATSF5=06(set DAA for South Korea) 5. ATS13=80 (set caller ID to Japanese format) When caller ID data is detected, SI2400 will echo "f" indicating the line reversal, "m" indicating the mark, and then caller ID data will follow. 6. ATDT18005551212 Example 2: V.22 in CTR21 countries 1. Power on reset 2. Set Host UART to 2400 bps 3. ATS07=02 (set for DPSK 1200 bps) 4. ATSF5=1C (set DAA for CTR21) 5. ATSF7=1C (set DAA for CTR21) 6. ATDT18005551212 Example 3: Bell 103 in Australia 1. Power on reset 2. Set Host UART to 2400 bps 3. ATS07=01 (set for FSK 300 bps) 4. ATSF5=78 (set DAA for Australia) 5. ATDT18005551212 Example 6: Security Application Example-- SIA P3 Pulse Format in CTR21 Countries 1. Power On Reset 2. ATSF5=1C Rev. 0.95 67 S i2 40 0 AP P E N D I X C--U L1 950 3 R D EDI T I O N Designs using the SI2400 pass all overcurrent and overvoltage tests for UL1950 3rd Edition compliance with a couple of considerations. Figure 18 shows the designs that can pass the UL1950 overvoltage tests, as well as electromagnetic emissions. The top schematic of Figure 18 shows the configuration in which the ferrite beads (FB1, FB2) are on the unprotected side of the sidactor (RV1). For this configuration, the current rating of the ferrite beads must be 6 A. The bottom schematic of Figure 18 shows the configuration in which the ferrite beads (FB1, FB2) are C24 75 @ 100 MHz, 6 A on the protected side of the sidactor (RV1). For this design, the ferrite beads can be rated at 200 mA. In a cost-optimized design, it is important to remember that compliance to UL1950 does not always require overvoltage tests. It is best to plan ahead and know which overvoltage tests will apply to your system. System-level elements in the construction, such as fire enclosure and spacing requirements, need to be considered during the design stages. Consult with your Professional Testing Agency during the design of the product to determine which tests apply to your system. 1.25 A Fuse/PTC RV1 FB1 TIP 75 @ 100 MHz, 6 A FB2 RING C25 Note: In this configuration, C24 and C25 are used for emissions testing. 1000 @ 100 MHz, 200 mA C24 FB1 1.25 A TIP Fuse/PTC 1000 @ 100 MHz, 200 mA RV1 FB2 RING C25 Figure 18. Circuits that Pass all UL1950 Overvoltage Tests 68 Rev. 0.95 SI2400 Pin Descriptions--SI2400 XTALI XTALO CLKOUT VD TXD RXD CTS RESET 1 2 3 4 5 6 7 8 GPIO1 GPIO2 GPIO3 ISOB GND C1A GPIO4 AOUT GPIO3 16 15 14 13 12 11 10 9 General Purpose Input/Output 3--This pin can be either a GPIO pin (analog in, digital in, digital out) or the ESC pin. Default is digital in. When programmed as ESC, a positive edge on this pin will cause the modem to go from online (connected) mode to the offline (command) mode. General Purpose Input/Output 4--This pin can be either a GPIO pin (analog in, digital in, digital out) or the ALERT pin. Default is digital in. When programmed as ALERT, this pin provides two functions. While the modem is connected, it will normally be low, but will go high if the carrier is lost or if an intrusion event has been detected. The ALERT pin is sticky, and will stay high until the host clears it by writing to the correct S register. GPIO4 Serial Interface XTALI/XTALO Crystal Oscillator Pins--These pins provide support for parallel resonant, AT cut crystals. XTALI also acts as an input in the event that an external clock source is used in place of a crystal. XTALO serves as the output of the crystal amplifier. A 4.9152 MHz crystal is required or a 4.9152 MHz clock on XTALI. CLKOUT Clock Output--This signal is typically used to clock an output system microcontroller. The frequency is 78.6432 MHz/(N+1), where N is programmable from 0 to 31. N defaults to 7 on power up. Setting N = 0 stops the clock. Receive Data--Serial data input. Transmit Data--Serial data output. communication communication C1A ISOB Control Interface CTS Clear to Send--Clear to send output used by the SI2400 to signal that the device is ready to receive more digital data on the receive data pin. Reset Input--An active low input that is used to reset all control registers to a defined, initialized state. Also used to bring the SI2400 out of sleep mode. RESET Miscellaneous Signals AOUT Analog Speaker Output--Provides an analog output signal for monitoring call progress tones or to output voice data to a speaker. Isolation Capacitor 1A--Connects to one side of the isolation capacitor C1. Isolink Bias Voltage--This pin should be connected to a .1 f cap to ground. RXD TXD GPIO1 General Purpose Input Output 1-- This pin can be either a GPIO pin (analog in, digital in, digital out) or the TXD2 pin. Default is digital. The user can program this pin to function as TXD2 if the secondary serial interface is enabled. This pin can also be programmed to function as the EOFR (end of frame receive) signal for HDLC framing. General Purpose Input Output 2--This pin can be either a GPIO pin (analog in, digital in, digital out) or the RXD2 pin. Default is digital in. The user can program this pin to function as RXD2 if the secondary serial interface is enabled. Power Signals VD Digital Supply Voltage--Provides the digital supply voltage to the SI2400. Nominally either 5 V or 3.3 V. Ground--Connects to the system digital ground. GPIO2 GND Rev. 0.95 69 S i2 40 0 Pin Descriptions--Si3015 QE2 DCT IGND C1B RNG1 RNG2 QB QE Isolation C1B Isolation Capacitor 1B--Connects to one side of isolation capacitor C1. Isolated Ground--Connects to ground on the line-side interface. Also connects to capacitor C2. 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 FILT2 FILT RX REXT REXT2 REF VREG2 VREG IGND Miscellaneous VREG Voltage Regulator--Connects to an external capacitor to provide bypassing for an internal power supply. Voltage Regulator 2--Connects to an external capacitor to provide bypassing for an internal power supply. Line Interface FILT FILT2 RX DCT Filter--Sets the time constant for the DC termination circuit. Filter 2--Sets the time constant for the DC termination circuit. Receive Input--Serves as the receive side input from the telephone network. DC Termination--Provides DC termination to the telephone network and input for line voltage monitors. External Resistor--Sets the real AC termination impedance. External Resistor 2--Sets the complex AC termination impedance. Ring 1--Connects through a capacitor to the TIP lead of the telephone line. Provides the ring and caller ID signals to the SI2400. Ring 2--Connects through a capacitor to the RING lead of the telephone line. Provides the ring and caller ID signals to the SI2400. Transistor Base--Connects to the base of transistor Q3. Transistor Emitter--Connects emitter of transistor Q3. to the VREG2 REXT REXT2 RNG1 RNG2 QB QE QE2 REF Transistor Emitter 2--Connects to the emitter of Q4. Reference--Connects to an external resistor to provide a high accuracy reference current. 70 Rev. 0.95 SI2400 Ordering Guide Table 24. Ordering Guide Chipset SI2400 SI2400 Region Global Global Power Supply 3.3/5 V Digital 3.3/5 V Digital Digital SI2400-KS SI2400-BS Line Si3015-KS Si3015-BS Temperature 0C to 70C -40C to 85C Rev. 0.95 71 S i2 40 0 Package Outline Figure 19 illustrates the package details for the SI2400 and Si3015. Table 25 lists the values for the dimensions shown in the illustration. Figure 19. 16-pin Small Outline Plastic Package (SOIC) Table 25. Package Diagram Dimensions Controlling Dimension: mm Symbo l Min A A1 A2 b c D E e H L L1 Inches Max 0.069 0.010 0.059 0.020 0.010 0.394 0.157 -- 0.244 0.050 -- 0.004 8 Millimeters Min 1.35 0.10 1.30 0.330 0.19 9.80 3.80 1.27 BSC 5.80 0.40 1.07 BSC -- 0 Max 1.75 0.25 1.50 0.51 0.25 10.01 4.00 -- 6.20 1.27 -- 0.10 8 0.053 0.004 0.051 0.013 0.007 0.386 0.150 0.050 BSC 0.228 0.016 0.042 BSC -- 0 72 Rev. 0.95 SI2400 Rev 0.9 to Rev 0.95 Change List ! ! ! ! ! ! The Power Supply Current numbers in Table 3 have been updated. The Power Supply Current numbers in Table 4 have been updated. The TBDs in Table 5 have been updated. Table 6 has been updated. The Typical Application Schematic has been updated. The Bill of Materials has been updated. Rev. 0.95 73 S i2 40 0 SI2400 Silicon Rev. B to Rev. C Change List Note: The change from SI2400 rev. B to SI2400 rev. C is a ROM change only. ! ! ! ! ! ! ! ! In PCM data mode, when using the UART 9th-bit escape feature or the GPIO3 escape pin, an escape when off-hook causes the SI2400 rev. B to go back on-hook. This errata has been eliminated in the SI2400 rev. C. The following command, 'SF5=0AS09=50', is required by the SI2400 rev. B upon initialization to improve ring detection. The SI2400 rev. C does not require this command. The S01 register defaults to 0x01 in rev. B and has changed to a default of 0x03 in rev. C. This default value of 0x03 seconds is needed for JATE compliance during blind dialing. The S08 register defaults to 0x0F in rev. B and has changed to a default of 0x0A in rev. C. This default value of 0x0A corresponds to a setting which allows for CTR21 ring-frequency compliance. FCC Part 68 requires that answering modems have a two second delay from off hook to answer tone generation. Implementations that use that autoanswer mode with the SI2400 rev. B must instead issue the command 'ATDT,,;ATA' immediately after ring detection to answer an incoming call. This command is not required for the SI2400 rev. C. In order to force the modem to stay off hook when using the 'ATA0' command, the 'ATSB3=66SB2=00' command is required before the 'ATA0' command for the SI2400 rev. B. This command is not required for the SI2400 rev. C. For the SI2400 rev. B, after caller ID data has been received by the SI2400, the SI2400 does not respond to an ATA ! ! ! Neither of these software workarounds are required in the SI2400 rev. C. For the SI2400 rev. B, register 0x3B must be set to 0x03 to improve caller ID in Australia. This is not required for the SI2400 rev. C. For the SI2400 rev. B, when using the Analog Monitor Mode of operation (ATDT###!0 or ATA0), the host must wait for a ',' result code and then send the ATSE4=12A0 command, or the host must send the command ATSF4=00SE4=12 after a connection is made. Neither of these workarounds are required with the SI2400 rev. C. For the SI2400 rev. C, the definition of register 0x0B has changed from Minimum Ring ON time to Minimum Ring OFF time, and the default is set to 0x28. 74 Rev. 0.95 SI2400 NOT E S : Rev. 0.95 75 S i2 40 0 Contact Information Silicon Laboratories Inc. 4635 Boston Lane Austin, TX 78735 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Email: productinfo@silabs.com Internet: www.silabs.com The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where personal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized application, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages. Silicon Laboratories, Silicon Labs, ISOcap, and ISOmodem are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders 76 Rev. 0.95 |
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